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MPA4609IPFBT Datasheet(PDF) 2 Page - Texas Instruments |
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MPA4609IPFBT Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 21 page ![]() MPA4609 2 SBOS252D www.ti.com SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY MPA4609 TQFP-48 PFB –40 °C to +85°C MPA4609 MPA4609IPFBT Tape and Reel, 250 " """ " MPA4609IPFBR Tape and Reel, 2000 NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS(1) Power Supply ...................................................................................... +7V Internal Power Dissipation ............................................................. 750mW Differential Input Voltage .................................................................. ±1.2V Input Voltage Range .............................................................. GND to +VS Storage Temperature Range: PFB ................................ –40 °C to +125°C Junction Temperature (TJ) ............................................................ +150°C Lead Temperature (soldering, 10s) ............................................... +300 °C ESD Rating (Human Body Model) .................................................. 3000V (Charge Device Model) ............................................... 1500V (Machine Model) ........................................................... 200V NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. PACKAGE/ORDERING INFORMATION(1) Read Amp Output Amp Read Amp Read Amp Read Amp Read Amp Read Amp Read Amp Read Amp Output Amp Output Amp Output Amp Band Gap Reference Common-Mode Reference MPA4609 Forward Reverse A OUT+ A OUT– B OUT+ B OUT– C OUT+ COUT– D OUT+ DOUT– A INF+ A INF– B INF+ B INF– C INF+ C INF– D INF+ D INF– A INR+ A INR– B INR+ B INR– C INR+ C INR– D INR+ D INR– +5V V CM 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω 3k Ω V CM V CM V CM V CM V CM V CM V CM FWD/REV (Pin 3) FWD/REV (Pin 34) 2.1V V CM V CM V CM V CM V CM BLOCK DIAGRAM ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. |
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