LM34910SD datasheet(10/11 Pages) NSC

10 / 11 page

Applications Information (Continued)

C4: The recommended value for C4 is 0.022 µF. A high

quality ceramic capacitor with low ESR is recommended as

C4 supplies a surge current to charge the buck switch gate

at turn-on. A low ESR also helps ensure a complete recharge

during each off-time.

C6: The capacitor at the SS pin determines the softstart

time, i.e. the time for the reference voltage at the regulation

comparator, and the output voltage, to reach their final value.

The time is determined from the following:

PC BOARD LAYOUT

The LM34910 regulation, over-voltage, and current limit

comparators are very fast, and respond to short duration

noise pulses. Layout considerations are therefore critical for

optimum performance. The layout must be as neat and

compact as possible, and all of the components must be as

close as possible to their associated pins. The current loop

formed by D1, L1, C2 and the S

GND and ISEN pins should be

as small as possible. The ground connection from C2 to C1

should be as short and direct as possible.

If it is expected that the internal dissipation of the LM34910

will produce excessive junction temperatures during normal

operation, good use of the PC board’s ground plane can help

considerably to dissipate heat. The exposed pad on the

bottom of the IC package can be soldered to a ground plane,

and that plane should extend out from beneath the IC, and

be connected to ground plane on the board’s other side with

several vias, to help dissipate the heat. The exposed pad is

internally connected to the IC substrate. Additionally the use

of wide PC board traces, where possible, can help conduct

heat away from the IC. Judicious positioning of the PC board

within the end product, along with the use of any available air

flow (forced or natural convection) can help reduce the junc-

tion temperatures.

LM34910SD Datasheet(PDF) 10 Page - National Semiconductor (TI)