VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

VSC8151

2.488Gb/s SONET/SDH

STS-48/STM-16 Section Terminator

Page 12

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

12/1/99

G52225-0, Rev. 2.9

Configuration Register Definitions

1.

OC12 | OC3 Multi-rate configuration control

0 | 0

=

STS-48 / STM-16 Mode

0 | 1

=

STS-3 / STM-1 Mode

1 | 0

=

STS-12 / STM4 Mode

1 | 1

=

Invalid

2.

FRD0

Allows manual control of framing behavior. FRD0 state controls whether the device is actively

searching for a frame boundary. Manual control will only function if FRD1 is set to a ‘1’.

0

=

Do not perform frame boundary acquisition

1

=

Attempt frame boundary acquisition

3.

FRD1

Determines whether reframing is automatically performed or controlled by the setting of the

FRD0 register. Automatic reframing uses the status of the SEF output to determine whether

reframing needs to take place, forcing frame acquisition as long as SEF is detected.

0

=

Frame acquisition is performed upon detection of SEF

1

=

Frame Acquisition is controlled manually

4.

SL1 | SL0

Controls detection width of A1/A2 boundary

0 | 0

=

Search for 12 bit pattern: h’F62

0 | 1

=

Search for 48 bit pattern: h’F6F6F6282828

1 | 0

=

Search for 24 bit pattern: h’F6F628

1 | 1

=

Do not search for start of frame.

5.

AIS

AIS Insertion mode

0

=

Retransmit received data

1

=

Replace received data with internally generated AIS

6.

B2G

=

In AIS mode if this bit is set to a "1", B2 calculation on #1 STS-1

frame is performed. If this bit is set to "0", the B2 field of the

#1 STS-1 AIS frame is set to 8’hFF.

7.

DP

Disable 16-bit PECL output bus RXPOUT[15:0]. The user should leave these outputs un-ter-

minated to reduce power consumption and noise if they are disabled.

0

=

Enable RXPOUT[15:0]

1

=

Disable RXPOUT[15:0].

8.

PT

Pass Through Mode.

0

=

Normal Operation

1

=

Disable modification of overhead bytes & BIP recalculation