LM2696 datasheet(11/19 Pages) NSC

11 / 19 page

Application Information (Continued)

While C

OUT and VOUT control the slew rate of the output

voltage, the total amount of time the LM2696 takes to startup

is dependent on two other terms. See the “Startup” section

for more information.

EXTV

CC CAPACITOR

External V

CC is a 3.65V rail generated by an internal sub-

regulator that powers the parts internal circuitry. This rail

should be bypassed witha1µF ceramic capacitor (X5R or

equivalent dielectric). Although EXTV

CC is for internal use, it

can be used as an external rail for extremely light loads (<50

µA). If EXTV

CC is accidentally shorted to GND the part is

protected bya5mA current limit. This rail also has an

under-voltage lockout that will prevent the part from switch-

ing if the EXTV

CC voltage drops.

SHUTDOWN

The state of the shutdown pin enables the device or places

it in a sleep state. This pin has an internal pull-up and may be

left floating or connected to a high logic level. Connecting

this pin to GND will shutdown the part. Shutting down the

part will prevent the part from switching and reduce the

quiescent current drawn by the part. This pin must be by-

passed witha1nF ceramic capacitor (X5R or Y5V) to

ensure proper logic thresholds.

CBOOT CAPACITOR

The purpose of an external bootstrap capacitor is to turn the

FET on by using the SW node as a pedestal. This allows the

voltage on the CBOOT pin to be greater than V

IN. Whenever

the catch diode is conducting and the SW node is at GND,

an internal diode will conduct that charges the CBOOT ca-

pacitor to approximately 4V. When the SW node rises, the

CBOOT pin will rise to approximately 4V above the SW

node. For optimal performance, a 0.1 µF ceramic capacitor

(X5R or equivalent dielectric) should be used.

PGOOD RESISTOR

The PGOOD resistor is used to pull the PGOOD pin high

whenever a steady state operating range is achieved. This

resistor needs to be sized to prevent excessive current from

flowing into the PGOOD pin whenever the open drain FET is

turned on. The recommendation is to use a 10 k

Ω–100 kΩ

resistor. This range of values is a compromise between rise

time and power dissipation.

CATCH DIODE

The catch or freewheeling diode acts as the bottom switch in

a non-synchronous buck switcher. Because of this, the diode

has to handle the full output current whenever the FET is not

conducting. Therefore, it must be sized appropriately to

handle the current. The average current through the diode

can be calculated by the equation:

D_AVG =IOUT•(1–D)

Care should also be taken to ensure that the reverse voltage

rating of the diode is adequate. Whenever the FET is con-

ducting the voltage across the diode will be approximately

equal to V

IN. It is recommended to have a reverse rating that

is equal to 120% of V

IN to ensure adequate guard banding

against any ringing that could occur on the switch node.

Selection of the catch diode is critical to overall switcher

performance. To obtain the optimal performance, a Schottky

diode should be used due to their low forward voltage drop

and fast recovery.

BYPASS CAPACITOR

A bypass capacitor must be used on the AV

IN line to help

decouple any noise that could interfere with the analog

circuitry. Typically, a small (1 µF) ceramic capacitor is placed

as close as possible to the AVIN pin.

EXTERNAL OPERATION STARTUP

The total startup time, from the initial V

IN rise to the time

OUT reaches its nominal value is determined by three sepa-

rate steps. Upon the rise of V

IN, the first step to occur is that

the EXTV

CC voltage has to reach its nominal output voltage

of 3.65V before the internal circuitry is active. This time is

dictated by the output capacitance (1 µF) and the current

limit of the regulator (5 mA typical), which will always be on

the order of 730 µs. Upon reaching its steady state value, an

internal delay of 200 µs will occur to ensure stable operation.

Upon completion the LM2696 will begin switching and the

output will rise. The rise time of the output will be governed

by the soft-start capacitor. To highlight these three steps a

timing diagram please refer to Figure 3.

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