LM2696 datasheet(12/19 Pages) NSC

12 / 19 page

Application Information (Continued)

UNDER- & OVER-VOLTAGE CONDITIONS

The LM2696 has a built in under-voltage comparator that

controls PGOOD. Whenever the output voltage drops below

the set threshold, the PGOOD open drain FET will turn on

pulling the pin to ground. For an over-voltage event, there is

no separate comparator to control PGOOD. However, the

loop responds to prevent this event from occurring because

the error comparator is essentially sensing an OVP event. If

the output is above the feedback threshold then the part will

not switch back on; therefore, the worst-case condition is

one on-time pulse.

CURRENT LIMIT

The LM2696 utilizes a peak-detect current limit that senses

the current through the FET when conducting and will imme-

diately terminate the on-pulse whenever the peak current

exceeds the threshold (4.9A typical). In addition to terminat-

ing the present on-pulse, it enforces a mandatory off-time

that is related to the feedback voltage.

If current limit trips and the feedback voltage is close to its

nominal value of 1.25V, the off-time imposed will be relatively

short. This is to prevent the output from dropping or any fold

back from occurring if a momentary short occurred because

of a transient or load glitch. If a short circuit were present, the

off-time would extend to approximately 12 µs. This ensures

that the inductor current will reach a low value (approxi-

mately 0A) before the next switching cycle occurs. The

extended off-time prevents runaway conditions caused by

hard shorts and high side blanking times.

If the part is in an over current condition, the output voltage

will begin to drop as shown in Figure 4. If the output voltage

is dropping and the current is below the current limit thresh-

old, (I

1), the part will assert a pulse (t2) after a minimum

off-time (t

1). This is in an attempt to raise the output voltage.

If the part is in an over current condition and the output

voltage is below the regulation value (V

L) as shown in Figure

4, the part will assert a pulse of minimal width (t

4) and extend

the off-time (t

5). In the event that the voltage is below the

regulation value (V

L) and the current is below the current

limit value, the part will assert two (or more) pulses sepa-

rated by some minimal off-time (t

1).

20153437

FIGURE 3. Startup Timing Diagram

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