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STR720 Datasheet(PDF) 72 Page - STMicroelectronics |
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STR720 Datasheet(HTML) 72 Page - STMicroelectronics |
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72 / 401 page ![]() STR720 - WAKE-UP INTERRUPT UNIT (WIU) 72/401 8.3.1 Interrupt Mode Selection. To configure the 16 lines as interrupt sources, use the following procedure: • Configure the mask bits of the 16 wake-up lines (WUMR); • Configure the triggering edge register of the wake-up lines (WUTR); • Set properly the enable and mask bits corresponding to the line of interrupt controller tied to Wake-up Unit: so an interrupt coming from one of the 16 lines can be correctly acknowledged; • Reset the WKUP-INT bit in the WUCTRL register to disable Wake-up Mode (default value is 0); • Set the INT_EN bit in the WUCTRL register to enable the 16 wake-up lines as external interrupt source lines. 8.3.2 Wake-up Mode Selection To configure the 16 lines as wake-up sources, use the following procedure: • Set the mask bits of the 16 wake-up lines (WUMR). • Configure the triggering edge register of the wake-up lines (WUTR). • Set the enable and the mask bits corresponding to the line of Interrupt Controller tied to Wake-up Unit (as for Interrupt Mode selection), only if an interrupt routine is to be executed after a wake-up event. Otherwise, if the wake-up event only restarts the execution of the code from where it was stopped, the interrupt channel shall be masked. • Set the WKUP-INT bit in the WUCTRL register to select Wake-up Mode. • Set the INT_EN bit in the WUCTRL register to enable the 16 wake-up lines as external interrupt source lines. This is not mandatory if the wake-up event does not require an interrupt response. • Write the sequence 1,0,1 to the STOP bit of WUCTRL. This is the STOP bit setting sequence. Pay attention that the three write operations are effective even though not executed in a strict sequence (intermediate instructions are allowed, except for write instructions to the registers of Wake-Up). If the sequence is not completed within 64 clock periods (system clock), a TIMEOUT expires and reset the sequence. In this case the software shall re-enter the sequence (1, 0, 1). To reset the sequence it is sufficient to write twice a logic ‘0’ to the STOP bit of WUCTRL register (corresponding anyway to a bad sequence). To detect if STOP Mode was entered or not, immediately after the last STOP bit setting of the sequence, poll the STOP bit itself (WUCTRL register). 1 |
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