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STR720 Datasheet(PDF) 105 Page - STMicroelectronics |
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STR720 Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 401 page ![]() STR720 - DRAM CONTROLLER (DRAMC) 105/401 Bit 1:0 SDRAMCOL[1:0]: SDRAM Column Width This field specifies the width of the SDRAM column address . = 0b00. 8 bits = 0b01. 9 bits = 0b10. 10 bits = 0b11. Reserved. Bank 2 Configuration Register (MB2Config) Address Offset: 04h Reset value: 0000h The Bank 2 Configuration Register (MB2Config) is a 16-bit read/write control register used to configure specific parameters of external region 2 (Bank 2). The MB2Config control bits are the same as MB1Config register. Bank 3 Configuration Register (MB3Config) Address Offset: 08h Reset value: 0000h The Bank 3 Configuration Register (MB3Config) is a 16-bit read/write control register used to configure specific parameters of external region 3 (Bank 3). The MB3Config control bits are the same as MB1Config register. 15 14 13 12 11 10 9 8 7 6543210 reserved DEVWID[1:0] DATALAT[1:0] SETUPTIME[2:0] IDLETIME[2:0] SDRAMCOL[1:0] rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6543210 reserved DEVWID[1:0] DATALAT[1:0] SETUPTIME[2:0] IDLETIME[2:0] SDRAMCOL[1:0] rw rw rw rw rw 1 |
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