MBF110PFWLPES datasheet(9/24 Pages) FUJITSU

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MBF110

Fujitsu Microelectronics, Inc.

RAH (A3-A0 Address 0001) Write Only

High Order Row Address Register

Bit 0 of this register and RAL form the 9-bit RowAddress Register

that selects the row to be converted.The L1 and L2 bits control two

open-drain outputs that can be used to drive LEDs.

MSB

LSB

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

–––––

RA8

Bit Number

Bit Name

Function

7L1

L1=0, LED1 output low

L1=1, LED1 output high-Z

6L2

L2=0, LED 2 output low

L2=1, LED 2 output high-Z

[5:1]

–

Reserved, write 0 to these bits.

RA8

MSB of Row Address

CAL (A3-A0 Address 0010) Read/Write

Low Order Column Address Register

CAL is a read/write register. Writing to this address writes to the

low-order 8 bits of the 9-bit ColumnAddress Register.The 9-bit

ColumnAddress Register selects a column from 0 through 299.

Writing to CAL causes the analog-to-digital (A/D) converter to

begin digitizing its input.The input of theA/D converter is selected

by bits 7 and 6 of the CAH register.The user should wait until the

row capture is completed before writing to the CAL.

Reading from this address returns the output of theA/D converter.

After writing to CAL, the user should wait untilA/D conversion

completes before reading theA/D converter.

MSB

LSB

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

CA7

CA6

CA5

CA4

CA3

CA2

CA1

CA0

Bit Number

Bit Name

Function

[7:0]

CA[7:0]

(WRITE) Low eight bits of Column Address Register.

(READ) Output of A/D converter.

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