FOR AUTOMOTIVE 105

°C OPERATION 2-WIRE SERIAL E

S-24CS01A/02A/04A H Series

21

3. Matching phases while S-24CS01A/02A/04A is accessed

The S-24CS01A/02A/04A does not have a pin for resetting (the internal circuit), therefore, the S-24CS01A/02A/04A

cannot be forcibly reset externally. If a communication interruption occurs in the S-24CS01A/02A/04A, it must be reset

by software.

For example, even if a reset signal is input to the microprocessor, the internal circuit of the S-24CS01A/02A/04A is not

reset as long as the stop condition is not input to the S-24CS01A/02A/04A. In other words, the S-24CS01A/02A/04A

retains the same status and cannot shift to the next operation. This symptom applies to the case when only the

microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage is restored,

reset the S-24CS01A/02A/04A (after matching the phase with the microprocessor) and input an instruction. The

following shows this reset method.

[How to reset S-24CS01A/02A/04A]

The S-24CS01A/02A/04A can be reset by the start and stop instructions. When the S-24CS01A/02A/04A is

reading data “0” or is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the

microprocessor cannot output an instruction to the SDA line. In this case, terminate the acknowledge output

operation or read operation, and then input a start instruction. Figure 25 shows this procedure.

First, input the start condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the microprocessor

sets the SDA line to high level. By this operation, the S-24CS01A/02A/04A interrupts the acknowledge output

operation or data output, so input the start condition

reset. To make doubly sure, input the stop condition to the S-24CS01A/02A/04A. Normal operation is then

possible.

1

2

8

9

SCL

SDA

Start

condition

Stop

condition

Start

condition

Dummy clock

Figure 25 Resetting S-24CS01A/02A/04A

*1.

After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition being input, a

write operation may be started upon receipt of a stop condition. To prevent this, input a start condition after 9

clocks (dummy clocks).

Remark

It is recommended to perform the above reset using dummy clocks when the system is initialized after

the power supply voltage has been raised.