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VSP2264 Datasheet(PDF) 39 Page - Texas Instruments |
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VSP2264 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 63 page ![]() Serial Interface Timing Specification 33 SLES059—March 2003 VSP2264 3.2.13 SHP Register SD15 SD14 SD13 SD12 SD11 SD10 SD9 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 0 1 0 0 1 0 SHP ext SHP mon 0 0 0 0 SHPfa3 MSB SHPfa2 SHPfa1 SHPfa0 LSB default 0 1 0 0 0 0 1 0 0 0 BIT NAME DEFAULT VALUE DESCRIPTION SD9 SHP ext 0 External selection: 0 = Without using external SHP clock 1 = Using external SHP clock SD8 SHP mon 1 Monitor selection: 0 = SHP clock monitor 1 = SHP clock without monitor SD3–SD0 SHPfa[3:0] 1000 SHP delay edge definition using 4 bits 1111 = SHP delay, maximum L 1000 = SHP delay, typical L 0000 = SHP delay, minimum 3.2.14 SHD Register SD15 SD14 SD13 SD12 SD11 SD10 SD9 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 0 1 0 1 0 0 SHD ext SHD mon 0 0 0 0 SHDfa3 MSB SHDfa2 SHDfa1 SHDfa0 LSB default 0 1 0 0 0 0 1 0 0 0 BIT NAME DEFAULT VALUE DESCRIPTION SD9 SHD ext 0 External selection: 0 = Without using external SHD clock 1 = Using external SHD clock SD8 SHD mon 1 Monitor selection: 0 = SHD clock monitor 1 = SHD clock without monitor SD3–SD0 SHDfa[3:0] 1000 SHD delay edge definition using 4 bits 1111 = SHD delay, maximum L 1000 = SHD delay, typical L 0000 = SHD delay, minimum |
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