COM20019I datasheet(34/65 Pages) SMSC

34 / 65 page

Low Cost ARCNET (ANSI 878.1) Controller with 2K x 8 On-Board RAM

Rev. 04-15-05

Page 34

SMSC COM20019I

DATASHEET

Figure 6.1 -

SEQUENTIAL ACCESS OPERATION

6.3

INTERNAL RAM

The integration of the 2K x 8 RAM in the COM20019I represents significant real estate savings. The most

obvious benefit is the 48 pin package in which the device is now placed (a direct result of the integration of

RAM). In addition, the PC board is now free of the cumbersome external RAM, external latch, and

multiplexed address/data bus and control functions which were necessary to interface to the RAM. The

integration of RAM represents significant cost savings because it isolates the system designer from the

changing costs of external RAM and it minimizes reliability problems, assembly time and costs, and layout

complexity.

6.3.1

Sequential Access Memory

The internal RAM is accessed via a pointer-based scheme. Rather than interfering with system memory,

the internal RAM is indirectly accessed through the Address High and Low Pointer Registers. The data is

Address Pointer Register

Low

2K x 8

RAM

Data Register

I/OAddress 04H

I/O Address 03H

11-Bit Counter

Memory

Address Bus

Memory

Data Bus

D0-D7

High

I/O Address 02H

INTERNAL

COM20019I Datasheet(PDF) 34 Page - SMSC Corporation