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UPD8872 Datasheet(PDF) 12 Page - NEC |
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UPD8872 Datasheet(HTML) 12 Page - NEC |
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12 / 24 page ![]() Data Sheet S15330EJ3V0DS 12 µ PD8872 φ TG1 to φ TG3, φ 1, φ 2 TIMING CHART Symbol Min. Typ. Max. Unit t7 −5 Note 3 25 − ns t9, t10 0 25 − ns t12 5000 10000 50000 ns t13, t14 0 50 − ns t15, t16 900 1000 − ns t17, t18 200 400 − ns t19 t12 t12 50000 ns t20, t21 0 50 − ns t22, t23 0 350 − ns Notes 1. Set the φ RB and φ CLB to high level during this period. 2. Set the φ RB to high level during this period. 3. Min. of t7 shows that the φ RB and φ CLB overlap each other. Remark Inverse pulse of the φ TG1 to φ TG3 can be used as φ CLB. φ CLB φ RB 90% 90% t7 RB φ CLB (Bit clamp mode) φ 2 φ TG1 to φ TG3 φ CLB (Line clamp mode) φ 1 φ 10% 90% 90% 90% 90% 90% 10% t12 t13 t17 t7 t19 t9 t20 t10 t23 t21 t22 Note 1 Note 2 t18 t16 t15 t14 |
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