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SAM2653 Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part # SAM2653
Description  INTEGRATED DIGITAL MUSIC INSTRUMENT
PDF  23 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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SAM2653 Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers

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SAM2653
DSP engine
The DSP engine operates on a frame-timing basis with the frame subdivided into 64
process slots. Each process is itself divided into 16 micro-instructions known as
« algorithm ». Up to 32 DSP algorithms can be stored on-chip in the Alg RAM memory,
allowing
the
device
to
be
programmed
for
a
number
of
audio
signal
generation/processing applications.
The DSP engine is capable of generating 64 simultaneous voices using algorithms such
as wavetable synthesis with interpolation, alternate loop and 24dB resonant filtering for
each voice. Slots may be linked together (ML RAM) to allow implementation of more
complex synthesis algorithms.
A typical musical instrument application will use a little more than half the capacity of the
DSP engine for synthesis, thus providing state of the art 38 voices synthesis polyphony.
The remaining processing power may be used for typical function like reverberation,
chorus, surround effect, equalizer, etc.
Frequently accessed DSP parameter data are stored into 5 banks of on-chip RAM
memory. Sample data or delay lines, which are accessed relatively infrequently, are
stored in external ROM, or into the built-in 32kx16 RAM. The combination of localized
micro-program memory and localized parameter data allows micro-instructions to
execute in 20.3 ns (49 MIPS). Separate busses from each of the on-chip parameter
RAM memory banks allow highly parallel data movement to increase the effectiveness
of each micro-instruction. With this architecture, a single micro-instruction can
accomplish up to 6 simultaneous operations (add, multiply, load, store, etc.), providing a
potential throughput of 294 million operations per second (MOPS).
Enhanced P16 control processor and I/O functions
The Enhanced P16 control processor is the new version of P16 processor with added
instructions allowing C compiling. The P16 is a general-purpose 16-bit CISC processor
core, which runs from external memory. A debug ROM is included on-chip for easy
development of firmware directly on the target system. This ROM also contains the
necessary code to directly program externally connected flash memory. The P16
includes 256 words of local RAM data memory for use as registers, scratchpad data
and stack.
The P16 control processor writes to the parameter RAM blocks within the DSP core in
order to control the synthesis process. In a typical application, the P16 control processor
parses and interprets incoming commands from the MIDI UART or from the scanning
interface and then controls the DSP by writing into the parameter RAM banks in the
DSP core. Slowly changing synthesis functions, such as LFOs, are implemented in the
P16 control processor by periodically updating the DSP parameter RAM variables.
The P16 control processor interfaces with other peripheral devices, such as the system
control and status registers, the on-chip MIDI UART, the on-chip timers and the
scanning interface through specialized « intelligent » peripheral I/O logic. This I/O logic
automates many of the system I/O transfers to minimize the amount of overhead
processing required from the P16.



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