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AD5379 Datasheet(PDF) 19 Page - Analog Devices |
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AD5379 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 28 page ![]() AD5379 Rev. 0 | Page 19 of 28 VBIAS FUNCTION The AD5379 has an on-chip voltage generator that provides a bias voltage of 4.25 V (min). The VBIAS pin is provided for bypassing and overdriving purposes only. It is not intended to be used as a supply or a reference. If VREF(+) > 4.25 V, VBIAS must be pulled high externally to an equal or higher potential (such as 5 V). The external voltage source should be capable of driving a 50 µA (typical) current sink load. REFERENCE SELECTION The voltages applied to VREF(+) and VREF(−) determine the output voltage range and span on VOUT0 to VOUT39. If the offset and gain features are not used (m and c are left at their power-on values), the reference levels required can be calculated as follows: VREF(+)min = (VOUTmax − VOUTmin)/3.5 VREF(−)max = (AGND + VOUTmin)/2.5 If the offset and gain features of the AD5379 are used, then the output range required is slightly different. The output range chosen should take into account the offset and gain errors that need to be trimmed out. Therefore, the chosen output range should be larger than the actual required range. The reference levels required can be calculated as follows: 1. Identify the nominal output range on VOUT. 2. Identify the maximum offset span and the maximum gain required on the full output signal range. 3. Calculate the new maximum output range on VOUT including the maximum offset and gain errors expected. 4. Choose the new VOUTmax and VOUTmin required, keeping the new VOUT limits centered on the nominal values and assuming REFGND is zero (or equal to AGND). Note that VDD and VSS must provide sufficient headroom. 5. Calculate the values of VREF(+) and VREF(−) as follows: VREF(+)min = (VOUTmax − VOUTmin)/3.5 VREF(−)max = (AGND + VOUTmin)/2.5 In addition, when using reference values other than those suggested (VREF(+) = 5 V and VREF(−) = −3.5 V), the expected offset error component changes as follows: VOFFSET = 0.125 × (VREF(−)A + 0.7 × VREF(+)A) where: VREF(−)A is the new negative reference value. VREF(+)A is the new positive reference value. If this offset error too large to calibrated out, then it is possible to adjust the negative reference value to account for this using the following equation: VREF(−)NEW = VREF(−)A − VOFFSET/2.625 Reference Selection Example Nominal Output Range = 10 V; (−2 V to +8 V) Offset Error = ±100 mV; Gain Error = ±3%; REFGND = AGND = 0 V; 1) Gain Error = ±3%; => Maximum Positive Gain Error = +3% => Output Range incl. Gain Error = 10 + 0.03 (10) = 10.3 V 2) Offset Error = ±100 mV; => Maximum Offset Error Span = 2(100) mV = 0.2 V => Output Range incl. Gain Error and Offset Error = 10.3 + 0.2 = 10.5 V 3) VREF(+) and VREF(−) Calculation: Actual Output Range = 10.5 V, that is, −2.25 V to +8.25 V (centered); => VREF(+) = (8.25 + 2.25)/3.5 = 3 V VREF(−) = −2.25/2.5 = −0.9 V If the solution yields inconvenient reference levels, the user can adopt one of three approaches: • Use a resistor divider to divide down a convenient, higher reference level to the required level. • Select convenient reference levels above VREF(+)min or below VREF(−)max. Modify the gain and offset registers to downsize the references digitally. In this way, the user can use almost any convenient reference level, but may reduce perform- ance by overcompaction of the transfer function. • Use a combination of these two approaches. |
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