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ICS950208 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS950208 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 19 page  Integrated Circuit Systems, Inc. ICS950208 0464B—08/04/03 Block Diagram Pin Configuration Recommended Application: CK-408 clock with driven mode only for Brookdale chipset with P4 processor. Output Features: • 3 - Pairs of differential CPU clocks @ 3.3V • 4 - 3V66 @ 3.3V • 10 - PCI @ 3.3V • 1 - 48MHz @ 3.3V fixed • 1 - 24_48MHz selectable output @ 3.3V • 2 - REF @ 3.3V, 14.318MHz Features/Benefits: • Programmable output frequency. • Programmable output divider ratios. • Programmable output rise/fall time. • Programmable output skew. • Programmable spread percentage for EMI control. • Watchdog timer technology to reset system if system malfunctions. • Programmable watch dog safe frequency. • Supports I 2C Index read/write and block read/write operations. • Uses external 14.318MHz crystal. Key Specifications: • CPU Output Jitter <150ps • 3V66 Output Jitter <250ps • CPU Output Skew <100ps Programmable Timing Control Hub™ for P4™ Frequency Table PLL2 PLL2 PLL1 PLL1 Spread Spread Spectr Spectrum um 48MHz 48MHz PCICLK (6:0), PCICLK_F (1:0) PCI 3V66 (3:0) 3V66 (3:0) 24_48MHz 24_48MHz X1 X1 X2 X2 XT XTAL AL OSC OSC CPU CPU DIVDER DIVDER PCI PCI DIVDER DIVDER 3V66 3V66 DIVDER DIVDER PD# PD# MUL MULTSEL(1:0) TSEL(1:0) SD SDATA SCLK SCLK Vtt_PWRGD# Vtt_PWRGD# FS (4:0) FS (4:0) I REF I REF RESET# RESET# Control Control Logic Logic Config. Config. Reg. Reg. REF (1:0) REF (1:0) 3 10 10 4 3 CPUCLKT (2:0) CPUCLKT (2:0) CPUCLKC (2:0) CPUCLKC (2:0) / 2 / 2 *MULTSEL1/REF1 1 48 REF0/MULTSEL0* VDDREF 2 47 GNDREF X1 3 46 VDDCPU X2 4 45 CPUCLKT2 GND 5 44 CPUCLKC2 *FS2/PCICLK_F0 6 43 GNDCPU *FS3/PCICLK_F1 7 42 PD# PCICLK_F2 8 41 CPUCLKT0 VDDPCI 9 40 CPUCLKC0 *FS4/PCICLK0 10 39 VDDCPU PCICLK1 11 38 CPUCLKT1 PCICLK2 12 37 CPUCLKC1 GND 13 36 GNDCPU PCICLK3 14 35 IREF PCICLK4 15 34 AVDD PCICLK5 16 33 GND PCICLK6 17 32 VDD3V66 VDDPCI 18 31 3V66_0 Vttpwr_GD# 19 30 3V66_1 RESET# 20 29 GND GND 21 28 3V66_2 *FS0/48MHz 22 27 3V66_3 *FS1/24_48MHz 23 26 SCLK AVDD48 24 25 SDATA 48-SSOP * Internal Pull-Up Resistor of 120K to VDD Bit2 Bit7 Bit6 Bit5 Bit4 CPU 3V66 PCI FS4 FS3 FS2 FS1 FS0 MHz MHz MHz 00000 102.00 68.00 34.00 00001 105.00 70.00 35.00 00010 108.00 72.00 36.00 00011 111.00 74.00 37.00 00100 114.00 76.00 38.00 00101 117.00 78.00 39.00 00110 120.00 80.00 40.00 00111 123.00 82.00 41.00 01000 126.00 72.00 36.00 01001 130.00 74.30 37.10 01010 136.00 68.00 34.00 01011 140.00 70.00 35.00 01100 144.00 72.00 36.00 01101 148.00 74.00 37.00 01110 152.00 76.00 38.00 01111 156.00 78.00 39.00 10000 160.00 80.00 40.00 10001 164.00 82.00 41.00 10010 166.60 66.60 33.30 10011 170.00 68.00 34.00 10100 175.00 70.00 35.00 10101 180.00 72.00 36.00 10110 185.00 74.00 37.00 10111 190.00 76.00 38.00 11000 66.80 66.80 33.40 11001 100.20 66.80 33.40 11010 133.60 66.80 33.40 11011 200.40 66.80 33.40 11100 66.60 66.60 33.30 11101 100.00 66.60 33.30 11110 200.00 66.60 33.30 11111 133.33 66.60 33.30 |
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