AD5399

Rev. D | Page 11 of 12

Shutdown Function

The AD5399 shutdown function allows both DACs to be

shutdown simultaneously. However, the A0 and SD bits work in

tandem, and the A0 logic state must be the same for shutdown

activation and deactivation (see Table 7).

Table 7. Shutdown Activation and Deactivation Sequence.

Sequence

of Events

Data-Word

in Binary

Shutdown Status

1

0X10 XXXX

XXXX XXXX

Activate shutdown on both DACs.

2

1X00 XXXX

XXXX XXXX

Both DACs remain at shutdown.

3

0X00 XXXX

XXXX XXXX

Deactivate shutdown. Both DACs

resume normal operation.

The A0 bit (MSB) must be in the same state when activating and deactivating

shutdown.

For users whose logic signals may be in three-state (random

levels) during power-up initialization, it is recommended to put

a pull-up resistor at the CS pin to disable chip select (Figure 24).

This avoids inadvertent shutdown as well as the inability to

deactivate shutdown due to an unknown A0 state. The resistor

value depends on the digital controller’s output impedance.

5V

2V

(D–2048)/4096

× 4V + V

BZ

AGND

DGND

C2

0.1

µF

C1

10

µF

AD5399

CS

CLK

SDI

R1

300k

Ω

Figure 24. Disable CS for Random Logic Mode