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EP7312 Datasheet(PDF) 21 Page - Cirrus Logic

Part # EP7312
Description  HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
PDF  64 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

EP7312 Datasheet(HTML) 21 Page - Cirrus Logic

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©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
21
EP7312
High-Performance, Low-Power System on Chip
Static Memory
Figure 7 through Figure 10 define the timings associated with all phases of the Static Memory. The following table
contains the values for the timings of each of the Static Memory modes.
Parameter
Symbol
Min
Typ
Max
Unit
EXPCLK rising edge to nCS assert delay time
tCSd
28
20
ns
EXPCLK falling edge to nCS deassert hold time
tCSh
27
20
ns
EXPCLK rising edge to A assert delay time
tAd
49
16
ns
EXPCLK falling edge to A deassert hold time
tAh
3
1019ns
EXPCLK rising edge to nMWE assert delay time
tMWd
36
10
ns
EXPCLK rising edge to nMWE deassert hold time
tMWh
36
10
ns
EXPCLK falling edge to nMOE assert delay time
tMOEd
37
10
ns
EXPCLK falling edge to nMOE deassert hold time
tMOEh
27
10
ns
EXPCLK falling edge to HALFWORD deassert delay time
tHWd
28
20
ns
EXPCLK falling edge to WORD assert delay time
tWDd
28
16
ns
EXPCLK rising edge to data valid delay time
tDv
8
1321ns
EXPCLK falling edge to data invalid delay time
tDnv
6
1530ns
Data setup to EXPCLK falling edge time
tDs
--
1
ns
EXPCLK falling edge to data hold time
tDh
--
3
ns
EXPCLK rising edge to WRITE assert delay time
tWRd
5
1123ns
EXPREADY setup to EXPCLK falling edge time
tEXs
--
0
ns
EXPCLK falling edge to EXPREADY hold time
tEXh
--
0
ns



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