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EP7312 Datasheet(PDF) 45 Page - Cirrus Logic

Part # EP7312
Description  HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
PDF  64 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

EP7312 Datasheet(HTML) 45 Page - Cirrus Logic

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DS508PP5
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
45
EP7312
High-Performance, Low-Power System on Chip
V17
A[26]/DRA[1]
2
Low
O
System byte address / SDRAM address
V18
VDDIO
Pad power
Digital I/O power,
3.3 V
V19
VDDIO
Pad power
Digital I/O power,
3.3 V
V20
A[24]/DRA[3]
‘
Low
O
System byte address / SDRAM address
W1
VSSIO
Pad ground
I/O ground
W2
VSSIO
Pad ground
I/O ground
W3
VSSIO
Pad ground
I/O ground
W4
PD[6]/SDQM[0]
1
Low
I/O
GPIO port D / SDRAM byte lane mask
W5
TMS
with p/u*
I
JTAG mode select
W6
PD[1]
1
Low
I/O
GPIO port D
W7
SSITXFR
1
Low
I/O
DAI/CODEC/SSI2 frame sync
W8
SSIRXFR
1
Input
‡
I/O
DAI/CODEC/SSI2 frame sync
W9
VSSCORE
Core Ground
Core Ground
W10
DRIVE[1]
2
High /
Low
I/O
PWM drive output
W11
ADCOUT
1
Low
O
SSI1 ADC serial data output
W12
FB[0]
I
PWM feedback input
W13
COL[5]
1
High
O
Keyboard scanner column drive
W14
COL[2]
1
High
O
Keyboard scanner column drive
W15
COL[0]
1
High
O
Keyboard scanner column drive
W16
D[30]
1
Low
I/O
Data I/O
W17
A[27]/DRA[0]
2
Low
O
System byte address / SDRAM address
W18
D[26]
1
Low
I/O
Data I/O
W19
VDDIO
Pad power
Digital I/O power, 3.3V
W20
D[25]
1
Low
I/O
Data I/O
Y1
VSSIO
Pad ground
I/O ground
Y2
VSSIO
Pad ground
I/O ground
Y3
VSSIO
Pad ground
I/O ground
Y4
PD[5]
1
Low
I/O
GPIO port D
Y5
PD[3]
1
Low
I/O
GPIO port D
Y6
PD[0]/LEDFLSH
1
Low
I/O
GPIO port D / LED blinker output
Y7
SSITXDA
1
Low
O
DAI/CODEC/SSI2 serial data output
Y8
ADCIN
I
SSI1 ADC serial input
Y9
VDDCORE
Core power
Digital core power, 2.5V
Y10
DRIVE[0]
2
Input
‡
I/O
PWM drive output
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Ball Location
Name
Strength
†
Reset
State
Type
Description



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