1

®

FN8223.0

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-352-6832

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

All other trademarks mentioned are the property of their respective owners.

X9C303

Terminal Voltage ±5V, 100 Taps, Log Taper

Digitally Controlled Potentiometer

(XDCP™)

FEATURES

• Solid-state potentiometer

• Three-wire serial interface

• 100 wiper tap points

—Wiper position stored in nonvolatile memory

and recalled on power-up

• 99 resistive elements, log taper

—Temperature compensated

—End to end resistance, ±15%

—Terminal voltages, ±5V

• Low power CMOS

—Active current, 3mA max.

—Standby current, 750µA max.

• High reliability

—Endurance, 100,000 data changes per bit

—Register data retention, 100 years

• X9C303, 32k

Ω

• Packages

—8-lead TSSOP

—8-lead SOIC

—8-pin DIP

DESCRIPTION

The Intersil X9C303 is a digitally controlled potentiom-

eter (XDCP). The device consists of a resistor array,

wiper switches, a control section, and nonvolatile

memory. The wiper position is controlled by a three-

wire interface.

The resistor array is composed of 99 resistive ele-

ments. Between each element and at either end are

tap points accessible to the wiper terminal. The posi-

tion of the wiper element is controlled by the CS, U/D,

and INC inputs. The position of the wiper can be

stored in nonvolatile memory and then be recalled

upon a subsequent power-up operation.

The device can be used as a three-terminal potentio-

meter or as a two-terminal variable resistor in a wide

variety of applications ranging from control, to signal

processing, to parameter adjustment. Digitally-

controlled potentiometers provide three powerful appli-

cation advantages; (1) the variability and reliability of a

solid-state potentiometer, (2) the flexibility of com-

puter-based digital controls, and (3) the use of nonvol-

atile memory for potentiometer settings retention.

BLOCK DIAGRAM

7-Bit

Up/Down

Counter

7-Bit

Nonvolatile

Memory

Store and

Recall

Control

Circuitry

One

of

Hundred

Decoder

Resistor

Array

U/D

INC

CS

Transfer

One-

Gates

99

98

97

96

2

1

0

Data Sheet

March 11, 2005