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54HC32 Datasheet(PDF) 1 Page - ON Semiconductor |
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54HC32 Datasheet(HTML) 1 Page - ON Semiconductor |
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1 / 5 page ![]() MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1 REV 1 © Motorola, Inc. 1997 6/97 Quad 2-Input OR Gate The MC74VHC32 is an advanced high speed CMOS 2–input OR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems. • High Speed: tPD = 3.8ns (Typ) at VCC = 5V • Low Power Dissipation: ICC = 2µA (Max) at TA = 25°C • High Noise Immunity: VNIH = VNIL = 28% VCC • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Designed for 2V to 5.5V Operating Range • Low Noise: VOLP = 0.8V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300mA • ESD Performance: HBM > 2000V; Machine Model > 200V • Chip Complexity: 48 FETs or 12 Equivalent Gates 3 Y1 1 A1 LOGIC DIAGRAM 2 B1 6 Y2 4 A2 5 B2 8 Y3 9 A3 10 B3 11 Y4 12 A4 13 B4 Y = A+B Pinout: 14–Lead Packages (Top View) 13 14 12 11 10 9 8 2 1 3 4567 VCC B4 A4 Y4 B3 A3 Y3 A1 B1 Y1 A2 B2 Y2 GND MC74VHC32 FUNCTION TABLE L L H H L H L H Inputs Output AB L H H H Y D SUFFIX 14–LEAD SOIC PACKAGE CASE 751A–03 DT SUFFIX 14–LEAD TSSOP PACKAGE CASE 948G–01 ORDERING INFORMATION MC74VHCXXD MC74VHCXXDT MC74VHCXXM SOIC TSSOP SOIC EIAJ M SUFFIX 14–LEAD SOIC EIAJ PACKAGE CASE 965–01 |
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