XRT7250 datasheet(145/463 Pages) EXAR

145 / 463 page

XRT7250

DS3/E3 FRAMER IC

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REV. 1.1.1

126

The meaning/role of each of these bit-field and their

corresponding input pins are defined below.

Bit 2 - DMO - Drive Monitor Output

This Read-Only bit-field indicates the logic state of

the DMO output pin of the Framer device. This input

pin is intended to be connected to the DMO output

pin of the XRT7300 DS3/E3/STS-1 LIU IC. If this bit-

field contains a logic “1”, then the DMO input pin is

"High”. The XRT7300 DS3/E3/STS-1 LIU IC will set

this pin "High” if the Transmit Driver Monitor circuitry

(within the XRT7300 device) has not detected any bi-

polar signals at the MTIP and MRING inputs (of the

XRT7300 device) within the last 128 + 32 bit periods.

Conversely, if this bit-field is set to “0”, then the DMO

input pin is "Low”. The XRT7300 DS3/E3/STS-1 LIU

IC will set this pin "Low” if bipolar signals are being

detected at the MTIP and MRING input pins.

For more information on the user/purpose of the

Drive Monitor feature, within the XRT7300 LIU IC,

please see the XRT7300 DS3/E3/STS-1 LIU IC Data

Sheet.

NOTE: If this customer is not using the XRT7300 DS3/E3/

STS-1 LIU IC, then this register bit-field and input pin can

be used for a variety of other purposes.

Bit 1 - RLOL - Receive Loss of Lock

This Read-Only bit-field indicates the logic state of

the RLOL input pin of the Framer device. This input

pin is intended to be connected to the RLOL output

pin of the XRT7300 DS3/E3/STS-1 LIU IC. If this bit-

field contains a logic “1”, then the RLOL input pin is

"High”. The XRT7300 LIU IC will drive this pin "High”

if the clock recovery phase locked loop circuitry (with-

in the XRT7300 device) has lost lock with the incom-

ing DS3 or E3 data-stream and is not properly recov-

ering clock and data.

Conversely, if this bit-field contains a logic “0”, then

the RLOL input pin is "Low”. The XRT7300 DS3/E3/

STS-1 LIU IC will hold this pin "Low” for as long as

this clock recovery phase-locked-loop circuit (within

the XRT7300 device) is properly locked onto the in-

coming DS3 or E3 data stream and is properly recov-

ering clock and data from this data stream.

Bit 0 - RLOS- Receive Loss of Signal

This Read-Only bit-field indicates the logic state of

the RLOS input pin of the Framer device. This input

pin is intended to be connected to the RLOS output

pin of the XRT7300 DS3/E3/STS-1 LIU IC. If this bit-

field contains a logic “1”, then the RLOS input pin is

"High”. The XRT7300 LIU IC will drive this signal

"High” if it is currently declaring an LOS (Loss of Sig-

nal) condition.

Conversely, if this bit-field contains a logic “0”, then

the RLOS input pin is "Low”. The XRT7300 LIU IC

will drive this signal "Low”, if it is NOT currently de-

claring an LOS (Loss of Signal) condition.

For more information on the LOS Declaration/Clear-

ance criteria, used by the XRT7300 device, please

see the XRT7300 DS3/E3/STS-1 LIU IC Data Sheet.

NOTE: Asserting the RLOS input pin will cause the Framer

device to generate a Change in LOS Condition interrupt

and declare an LOS (Loss of Signal) condition to the Micro-

processor/Microcontroller. Therefore, the user is not

advised to use the RLOS input pin as a General Purpose

Input pin.

LINE INTERFACE SCAN REGISTER (ADDRESS = 0X81)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

DMO

RLOL

RLOS

R/O

000

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