XRT7250 datasheet(149/463 Pages) EXAR

149 / 463 page

XRT7250

DS3/E3 FRAMER IC

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REV. 1.1.1

130

the two P-bits are set to zero if an even number of

"ones" is found in the payload of the previous DS3

frame. For information on how the Receive DS3

Framer handles P-bits, please see Section 3.3.2.6.1.

CP-(Path) Parity Bits (Applies to only the C-Bit

Parity Framing Format)

Each DS3 M-Frame consists of tw0 (2) CP-Bits.

These two bits have a very similar role to those of P-

Bits. Further, the XRT7250 Framer IC processes CP-

Bits in an identical manner that it handles P-Bits.

However for some DS3 applications, there is a differ-

ence between P and CP-bits, that should be noted.

• P-Bits are used to support error detection of a DS3

data stream as it travels from one T.E. to the next.

(e.g., a single DS3 link between two T.E.)

• CP-Bits are used to support error detection of DS3

data stream as it travels from the Source T.E.

(where the DS3 Data Stream originated), to the

Sink T.E, (where the DS3 Data Stream is termi-

nated.)

NOTE: This transmission path from Source T.E. to Sink T.E.

may involve numerous T.E.

• P-Bits are verified and recomputed as it passes

through a Mid-Network T.E. (which is neither a

Source nor Sink T.E.)

• The values of the CP-Bits (as generated by the

Source T.E.) must be preserved as a DS3 frame

travels to the Sink T.E. (Through any number of

Mid-Network T.E.)

For more information on how CP-Bits are processed,

please see section 3.3.2.6.2

4.1.3

Alarm and Signaling-Related Overhead

Bits

The DS3 frame consists of mumerous bit-fields which

are used to support the handling of alarm and signal-

ing information. Each of these bit-fields are defined

below.

The Alarm Indication Signal (AIS) Pattern (C-Bit

Parity Framing Format only)

The Alarm Indication Signal (AIS) pattern is an alarm

signal that is inserted into the outbound DS3 stream

when a failure is detected by the Local Terminal. The

Transmit DS3 Framer will generate the AIS pattern as

defined in ANSI.T1.107a-1990, which is described as

follows.

VALID M-BITS, F-BITS, AND P-BITS

• All C-bits are zeros

• All X-bits are set to "1"

• A repeating "1010..." pattern is written into the pay-

load of the DS3 frames.

Consequently, no user (or payload) data will be trans-

mitted while the Transmit Section of the chip is trans-

mitting the AIS pattern.

The IDLE Condition Signal

The IDLE Condition signal is used to indicate that the

DS3 channel is functionally sound, but has not yet

been assigned any traffic. The Transmit Section will

transmit the IDLE Condition signal as defined in ANSI

T1.107a-1990, which is described as follows.

• Valid M-bits, F-bits, and P-bits

• The three CP-bits (F-frame #3) are zeros

• The X-bits are set to "1"

• A repeating "1100.." pattern is written into the pay-

load of the DS3 frames.

FEAC - Far End Alarm & Control (Only available

for the C-bit Parity Frame Format)

The third C-bit (C13 or FEAC) in the first F-frame is

used as the Far End Alarm and Control (FEAC) chan-

nel between the Near-End DS3 terminal and the Re-

mote DS3 terminal. The FEAC channel carries:

• Alarm and Status Information

• Loopback commands to initiate and deactivate DS3

and DS1 loopbacks at the distant terminals.

The FEAC message consists of a six (6) bit code

word of the form [d5, d4, d3, d2, d1 d0]. This mes-

sage is encapsulated with 10 framing bits to form a

16 bit FEAC Message, as illustrated below. The

FEAC signals are encoded into repeating 16 bit mes-

sage of the form:

Since each DS3 frame carries only one FEAC bit, 16

DS3 frames are required to deliver 1 complete FEAC

message. The six bits labeled "dx" can represent up-

to 64 distinct messages, of which 43 have been de-

fined in the standards. For a more detailed discus-

sion on the transmission of FEAC Messages, please

see Section 3.2.3.1.

FEBE - Far End Block Error (Only available for the

C-bit Parity Frame Format)

F-Frame # 4 consists of 3 bit fields for the FEBE (Far-

End Block Error) channel. If the (Local) Receive Sec-

tion (within the Framer IC) detects P-bit parity errors,

CP-bit errors or a framing error on the incoming (re-

ceived) DS3 stream it will inform the Transmit Section

of this fact. The Transmit Section will, in turn, set the

0111111

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