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XRT7250 Datasheet(PDF) 269 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 269 Page - Exar Corporation

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XRT7250
áç
áç
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DS3/E3 FRAMER IC
REV. 1.1.1
250
How to configure the XRT7250 into Mode 5
1. Set the NibIntf input pin "High".
2. Set the TimRefSel[1:0] bit-fields (within the
Framer Operating Mode Register) to "01" as illus-
trated below.
3. Interface the XRT7250, to the Terminal Equip-
ment, as illustrated in Figure 108.
5.2.1.6
4.2.1.6 Mode 6 - The Nibble-Parallel/
Local-Timed/Frame-Master Interface Mode
Behavior of the XRT7250
If the XRT7250 has been configured to operate in this
mode, then the XRT7250 will function as follows:
A. Local-Timed - Uses the TxInClk signal as the
Timing Reference
In this mode, the Transmit Section of the XRT7250
will use the TxInClk signal at its timing reference.
Further, the chip will internally divide the TxInClk
clock signal by a factor of 4 and will output this divid-
ed clock signal via the TxNibClk output pin. The
Transmit Terminal Equipment Input Interface block
(within the XRT7250) will use the rising edge of the
TxNibClk signal, to latch the data, residing on the Tx-
Nib[3:0] into its circuitry.
FIGURE 109. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT7250 AND THE TERMINAL
EQUIPMENT (E3, MODE 5 OPERATION)
Terminal Equipment Signals
TxInClk
Tx_Start_of_Frame
E3_Nib_Clock_In
E3_Data_Out[3:0]
Payload Nibble [380]
Overhead Nibble [0]
XRT7250 Transmit Payload Data I/F Signals
E3 Frame Number N
E3 Frame Number N + 1
Note: Terminal Equipment pulses
“TxFrameRef” in order to denote
the E3 Frame Boundary.
TxInClk
TxFrameRef
TxNibClk
TxNib[3:0]
Nibble [380]
Overhead Nibble [0]
E3_Overhead_Ind
TxOH_Ind
TxOH_Ind pulses high for 3 Nibble periods
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT2
BIT 1
BIT 0
Local
Loopback
DS3/E3*
Internal
LOS
Enable
RESET
Interrupt
Enable
Reset
Frame
Format
TimRefSel[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
00
101
0
0
1



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