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XRT7250 Datasheet(PDF) 270 Page - Exar Corporation

Part # XRT7250
Description  DS3/E3 FRAMER IC
PDF  463 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 Datasheet(HTML) 270 Page - Exar Corporation

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XRT7250
DS3/E3 FRAMER IC
REV. 1.1.1
251
B. Nibble-Parallel Mode
The XRT7250 will accept the E3 payload data, from
the Terminal Equipment, in a parallel manner, via the
TxNib[3:0] input pins. The Transmit Terminal Equip-
ment Input Interface will latch this data into its circuit-
ry, on the rising edge of the TxNibClk output signal.
C. Delineation of outbound E3 Frames
The Transmit Section will use the TxInClk input signal
as its timing reference and will initiate the generation
of E3 frames, asynchronous with respect to any ex-
ternal signal. The XRT7250 will pulse the TxFrame
output pin "High" whenever it is processing the last
bit, within a given outbound E3 frame.
D. Sampling of payload data, from the Terminal
Equipment
In Mode 6, the XRT7250 will sample the data, at the
TxNib[3:0] input pins, on the third rising edge of the
TxInClk clock signal, following a pulse in the TxNibClk
signal (see Figure 111).
NOTE: The TxNibClk signal, from the XRT7250 operates
nominally at 8.592 MHz (e.g., 34.368 MHz divided by 4).
Interfacing the Transmit Payload Data Input Inter-
face block of the XRT7250 to the Terminal Equip-
ment for Mode 6 Operation
Figure 110 presents an illustration of the Transmit
Payload Data Input Interface block (within the
XRT7250) being interfaced to the Terminal Equip-
ment, for Mode 6 Operation.
Mode 6 Operation of the Terminal Equipment
In Figure 110 both the Terminal Equipment and the
XRT7250 will be driven by an external 8.592MHz
clock signal. The Terminal Equipment will receive the
8.592MHz clock signal via the E3_Nib_Clock_In input
pin. The XRT7250 will output the 8.592MHz clock
signal via the TxNibClk output pin.
The Terminal Equipment will serially output the data
on the E3_Data_Out[3:0] pins upon the rising edge of
the signal at the E3_Clock_In input pin. The
XRT7250 will latch the data, residing on the Tx-
Nib[3:0] input pins, on the rising edge of the TxNibClk
signal.
In this case the XRT7250 has the responsibility of
providing the framing reference signal by pulsing the
TxFrame output pin (and in turn the
Tx_Start_of_Frame input pin of the Terminal Equip-
ment) "High" for one bit-period, coincident with the
last bit within a given E3 frame.
Finally, the XRT7250 will always internally generate
the Overhead bits, when it is operating in both the E3
and Nibble-parallel modes. The XRT7250 will pull the
TxOHInd input pin "Low".
The behavior of the signals between the XRT7250
and the Terminal Equipment for E3 Mode 6 Operation
is illustrated in Figure 111.
FIGURE 110. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA
INPUT INTERFACE BLOCK OF THE XRT7250 FOR MODE 6 (NIBBLE-PARALLEL/LOCAL-TIMED/FRAME-MASTER)
OPERATION
Terminal Equipment
XRT7250 E3 Framer
E3_Data_Out[3:0]
E3_Nib_Clock_In
Tx_Start_of_Frame
TxNib[3:0]
TxNibClk
TxNibFrame
NibInt
VCC
4
34.368MHz Clock Source
TxInClk
8.592MHz
TxOH_Ind
E3_Overhead_Ind



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