XRT7250 datasheet(431/463 Pages) EXAR

431 / 463 page

XRT7250

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DS3/E3 FRAMER IC

REV. 1.1.1

412

6.3.4

The Receive Overhead Data Output Inter-

face

Figure 203 presents a simple illustration of the Re-

ceive Overhead Data Output Interface block within

the XRT7250.

The E3, ITU-T G.832 frame consists of 537 bytes. Of

these bytes, 530 bytes are payload bits and the re-

maining 7 bytes are overhead bytes. The XRT7250

has been designed to handle and process both the

payload type and overhead type bytes for each E3

frame.

FIGURE 202. FLOW CHART DEPICTING THE FUNCTIONALITY OF THE LAPD RECEIVER (CONTINUED)

Compute “Frame Check Sequence (FCS)” value of incoming

LAPD Message Frame.

Compare “locally-computed” FCS value with that contained

within the newly received LAPD Message frames.

Do the

two FCS values

Match?

FCS Error Detected

Assert the “Rx FCS Error” bit-field within the “Rx E3

LAPD Status Register (Address = 0x19).

Generate the “Receive LAPD Message frame” interrupt.

From Figure 184

End

Yes

FIGURE 203. A SIMPLE ILLUSTRATION OF THE RECEIVE OVERHEAD OUTPUT INTERFACE BLOCK

Receive Overhead

Output Interface

Block

Receive Overhead

Output Interface

Block

From Receive

E3 Framer Block

RxOHFrame

RxOH

RxOHClk

RxOHEnable

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