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HCPL-5150 Datasheet(PDF) 12 Page - Agilent(Hewlett-Packard) |
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HCPL-5150 Datasheet(HTML) 12 Page - Agilent(Hewlett-Packard) |
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12 / 16 page  12 Applications Information Eliminating Negative IGBT Gate Drive To keep the IGBT firmly off, the HCPL- 5150 has a very low maximum VOL specification of 1.0 V. The HCPL- 5150 realizes this very low VOL by using a DMOS transistor with 4 Ω (typical) on resistance in its pull down circuit. When the HCPL- 5150 is in the low state, the IGBT gate is shorted to the emitter by Rg + 4 Ω.. Minimizing Rg and the lead inductance from the HCPL- 5150 to the IGBT gate and emitter (possibly by mounting the HCPL- 5150 on a small PC board directly above the IGBT) can eliminate the need for negative IGBT gate drive in many applications as shown in Figure 25. Care should be taken with such a PC board design to avoid routing the IGBT collector or emitter traces close to the HCPL- 5150 input as this can result in unwanted coupling of transient signals into the HCPL- 5150 and degrade performance. (If the IGBT drain must be routed near the HCPL- 5150 input, then the LED should be reverse- biased when in the off state, to prevent the transient signals coupled from the IGBT drain from turning on the HCPL- 5150.) Selecting the Gate Resistor (Rg) to Minimize IGBT Switching Losses. Step 1: Calculate Rg Minimum from the IOL Peak Specification. The IGBT and Rg in Figure 26 can be analyzed as a simple RC circuit with a voltage supplied by the HCPL- 5150. (VCC - VEE - VOL) Rg = ––––––––––––––––– IOLPEAK (VCC – VEE – 1.7 V) = ––––––––––––––––––– IOLPEAK (15 V + 5 V – 1.7 V) = ––––––––––––––––––––– 0.6 A = 30.5 Ω The VOL value of 2 V in the previous equation is a conservative value of VOL at the peak current of 0.6 A (see Figure 6). At lower Rg values the voltage supplied by the HCPL- 5150 is not an ideal voltage step. This results in lower peak currents (more margin) than predicted by this analysis. When negative gate drive is not used, VEE in the previous equation is equal to zero volts. Step 2: Check the HCPL-5150 Power Dissipation and Increase Rg if Necessary. The HCPL- 5150 total power dissipation (PT) is equal to the sum of the emitter power (PE) and the output power (PO): PT = PE + PO PE = IF • VF • Duty Cycle PO = PO(BIAS) + PO (SWITCHING) = ICC • (VCC - VEE) + ESW(Rg, Qg) • f For the circuit in Figure 26 with IF (worst case) = 18 mA, Rg = 30.5 Ω, Max Duty Cycle = 80%, Qg = 250 nC, f = 20 kHz and TA max = 125°C: PE = 18 mA•1.8 V • 0.8 = 26 mW PO = 4.25 mA•20 V + 2.0 µJ•20 kHz = 85 mW + 40 mW = 125 mW > 112 mW (PO(MAX)@125°C = 250mW- 23 °C • 6mW/°C) The value of 4.25 mA for ICC in the previous equation was obtained by derating the ICC max of 5 mA (which occurs at - 55 °C) to I CC max at 125°C. Since PO for this case is greater than PO(MAX), Rg must be increased to reduce the HCPL- 5120 power dissipation. PO(SWITCHING MAX) = PO(MAX) - PO(BIAS) = 112mW – 85 mW = 27 mW PO(SWITCHINGMAX) ESW(MAX) = –––––––––––––––– f 27 mW = ––––––––– = 1.35 µJ 20kHz For Qg = 250 nC, from Figure 27, a value of ESW = 1.35 µJ gives a Rg = 90Ω. Figure 25. Recommended LED Drive and Application Circuit + HVDC 3-PHASE AC - HVDC 0.1 µF V CC = 18 V 1 3 + 2 4 8 6 7 5 270 Ω CONTROL INPUT Rg Q1 Q2 74XXX OPEN COLLECTOR _ +5 V |
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