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AM29LV033MU Datasheet(PDF) 51 Page - Advanced Micro Devices

Part # AM29LV033MU
Description  32 Megabit (4 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
PDF  56 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29LV033MU Datasheet(HTML) 51 Page - Advanced Micro Devices

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November 11, 2002
Am29LV033MU
51
ADV ANCE
I N FO RMAT I O N
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
°C, 3.0 V V
CC, 100,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90
°C, V
CC = 3.0 V, 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most words
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table
10 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 100,000 cycles.
LATCHUP CHARACTERISTICS
Note: Includes all pins except V
CC. Test conditions: VCC = 3.0 V, one pin at a time.
TSOP PIN AND BGA PACKAGE CAPACITANCE
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A = 25°C, f = 1.0 MHz.
DATA RETENTION
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.4
15
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
90
TBD
sec
Effective Write Buffer Program Time, Per Byte
TBD
TBD
µs
Excludes system level
overhead (Note 5)
Byte Program Time
TBD
TBD
µs
Accelerated Effective Byte Program Time
TBD
TBD
µs
Chip Program Time (Note 3)
TBD
TBD
sec
Description
Min
Max
Input voltage with respect to V
SS on all pins except I/O pins
(including A9, OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS on all I/O pins
–1.0 V
V
CC + 1.0 V
V
CC Current
–100 mA
+100 mA
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN = 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
C
OUT
Output Capacitance
V
OUT = 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
C
IN2
Control Pin Capacitance
V
IN = 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF
Parameter Description
Test Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°C10
Years
125
°C20
Years



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