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VSC7440 Datasheet(PDF) 242 Page - Microsemi Corporation |
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VSC7440 Datasheet(HTML) 242 Page - Microsemi Corporation |
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242 / 444 page ![]() Functional Descriptions VMDS-10492 VSC7440 Datasheet Revision 4.2 225 3.24.7 Scheduling All egress queues are combined in a tree structure where the root is connected to an egress port. The scheduling capabilities consist of the following three aspects. • Structure of the hierarchy • Bandwidth limitation (shaping) • Bandwidth distribution (arbitration between inputs) 3.24.7.1 Hierarchy Structure The hierarchy consists of three layers: queue, middle, and outer. • Layer 0 is the queue level. All inputs to scheduler elements are connected to a specific egress queue, as described in the previous section. This layer has 416 elements with eight inputs each. A number of those can be reconfigured to have 16 inputs, in which case they are called “large elements”. Only elements in multiples of two can become large, so the one following cannot be used. • Layer 1 is the middle layer. There are 64 elements in this layer, all having 32 inputs. These inputs are connected to outputs of the layer 0 elements, through the HSCH::L0_CFG table. • Layer 2 is the output layer. There is one scheduler element per egress port (15 elements). All elements have 64 inputs connected to outputs from layer 1 elements. Input n on the layer 2 elements can only be connected to layer 1 element n, configured in HSCH::L1_CFG. 3.24.7.2 Default Hierarchy The initialization engine in the scheduler builds a default hierarchy for all ports, and no further configuration of it is needed. It sets all ports into normal mode, using eight large elements on layer 0, and one element on each of the two other layers. The layer 0 elements are all configured for frame based round robin selection, and the layer 1 elements for strict selection of highest available input. Port n uses elements 16n, 16n +2, 16n + 14,... for layer 0. The example in the following illustration is for port 7. |
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