FIDO5210BBCZ datasheet(17/19 Pages) AD

17 / 19 page

Data Sheet

fido5100/fido5200

Rev. E | Page 17 of 19

APPLICATIONS INFORMATION

REAL-TIME ETHERNET

MULTIPROTOCOL (REM)

SWITCH

CONFIGURABLE TO

SUPPORT TOPOLOGY

MANAGEMENT

PRP

DLR

MRPD

RSTP

MRP

HSR

INDUSTRIAL FIELD DEVICE

OR CONTROLLER APPLICATION

CONFIGURABLE TO

SUPPORT NETWORK

MANAGEMENT

DCP

LLDP

AGING

VLAN

DHCP

IGMP

LEARNING

CONFIGURABLE TO

SUPPORT INDUSTRIAL

ETHERNET PROTOCOLS

PROFINET, EtherNet/IP,

Modbus TCP, EtherCAT,

ETHERNET POWERLINK

FAST CYCLE TIME,

FAST STARTUP, AND

LOW JITTER

PriorityChannel

TECHNOLOGY

CPU OR

SoC

RAM

APPLICATION

I/O

FLASH

PHY

INDUSTRIAL ETHERNET

NETWORK

PHY

Figure 11. Application for the REM Switch

REM SWITCH HARDWARE

The basic REM switch hardware is identified as the fido5100 or

fido5200. For example, the fido5100 supports the following

protocols:

•

PROFINET RT and IRT, Class B and Class C with fast

startup (Version 2.3)

•

EtherNet/IP with and without DLR (supervisor and node,

announce based and beacon based), QuickConnect, CIP

Sync, and CIP Motion

•

Modbus TCP

•

POWERLINK

The fido5200 supports the following protocols:

•

EtherCAT

•

All protocols defined for the fido5100

The REM switches are PI Net Load Class III capable, and

support media redundancy for planned duplication (MRPD),

high availability seamless redundancy (HSR), and parallel

redundancy protocol (PRP). They also support IEEE 1588

Version 2 for ordinary clock (both peer to peer and end to end

transparent clocks), raw frames, and user datagram protocol

(UDP), as well as discovery configuration protocol (DCP), link

layer discovery protocol (LLDP), dynamic host configuration

protocol (DHCP), rapid spanning tree protocol (RSTP), virtual

local area network (VLAN), and Internet group management

protocol (IGMP) snooping support.

REM Switch Drivers

The REM switch driver for each protocol is provided as

portable C code. The REM Switch Software Driver User Guide

describes the driver for each protocol and its integration into a

host processor. Visit www.analog.com/en/products/industrial-

ethernet.html to download the user guide.

BOARD LAYOUT

The following guidelines provide best practice for board layout

with the REM switch:

•

Use individual polygons for the power planes for each of

the three supplies. Allow at least 0.2 mm of isolation

between the power planes.

•

Isolate clock signals from the other traces and make them

as short as possible.

•

A minimum clearance around the REM switch of 3 mm is

required to facilitate heat dissipation.

DESIGN CONSIDERATIONS

Power

The REM switch require 1.2 V and 3.3 V power supplies. Each

power level requires its own power plane on the PCB.

The REM switch uses 3.3 V LVCMOS logic levels for its I/O.

This I/O requires a 3.3 V (±10%) power supply circuit. Ideally,

this circuit uses a low noise switching power supply. The REM

switch use a 1.2 V (±10%) supply for the core of the chip. The

core power supply requires its own power plane on the PCB.

Additional best practices include

•

Use one 0.1 µF bypass capacitor for every 1.2 V power pin.

•

Use a power supply IC rated to supply at least 100 mA.

•

Supply 3.3 V power from its own layer on the PCB to the

3.3 V power input pins on the REM switch.

•

Use one 0.1 µF bypass capacitor for every 3.3 V power pin.

•

For the 1.2 V analog supply, the signal must be isolated

using a 120 Ω, 500 mA ferrite bead and 10 µF, 1 µF, and

0.1 µF filtering capacitors.

FIDO5210BBCZ Datasheet(PDF) 17 Page - Analog Devices

FIDO5210BBCZ Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL