MITSUBISHI <Dig./Ana.INTERFACE>

SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP

M62023L,P,FP

1997.5.30- rev

(

/

)

PRELIMINARY

PRELIMINARY

Notice:This

is not

a final

specification.

Some

parametric

limits

are

subject

to change.

Com

1.24V

3

7

5

RES

RES

MCU

or

CPU

+3V

(MAIN POWER SUPPLY)

GND

RESET

CIRCUIT

SW

DELAY

CIRCUIT

6

M62023

1

8

4

2

CS

BATTERY

3V

CMOS

RAM

EXPLANATION OF TERMINALS

and the like.

Backup power supply is connected to this pin.

If a lithium battery is used, insert a resistor in series for safety purposes.

+3V input pin. Connect to a logic power supply.

A delay capacitor is connected to this pin. By connecting a capacitor, it is

possible to delay each output.

Connect to the positive reset input of a microcontroller. The pin is capable of

flowing 1mA sink current.

Reference for all signals

Connect to the negative reset input of a microcontroller. The pin is capable of

flowing 1mA sink current.

thereby letting RAM be active. Under failure or backup condition, the CS

output is set to high level, then RAM enters standby state disabling read/write

function. The pin is capable of flowing a 1mA sink current.

Power supply output

Backup power supply

input

Pin No.

Name

Function

Power supply input

Delay capacitor

connection pin

Positive reset output

Ground

Negative reset output

Chip select output

1

2

3

4

5

6

7

8

Symbol

RES

GND

CS

RES

APPLICATION EXAMPLE

3

4