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Copyright © 2017 Toshiba Memory Corporation. All rights reserved.

Client SSD XG5 Series Brochure Rev.1.00

Products and specifications discussed herein are for reference purposes

only and are subject to change without notice. All information discussed

herein is provided on an “as is” basis, without warranties of any kind.

Before creating and producing designs and using, customers must refer to

and comply with the latest versions of the product specifications.

PIN ASSIGNMENT ON M.2 2280 MODULE CONNECTOR

Pin #

Name

Description

Pin #

Name

Description

1

GND

GND

2

+3.3V

3.3 V Source

3

GND

GND

4

+3.3V

3.3 V Source

5

PETn3

PCIe Lane 3

Device Transmitter

6

Reserved

NC

7

PETp3

8

Reserved

NC

9

GND

GND

10

LED1#

Device Activity

11

PERn3

PCIe Lane 3

Device Receiver

12

+3.3V

3.3 V Source

13

PERp3

14

+3.3V

3.3 V Source

15

GND

GND

16

+3.3V

3.3 V Source

17

PETn2

PCIe Lane 2

Device Transmitter

18

+3.3V

3.3 V Source

19

PETp2

20

Reserved

NC

21

GND

GND

22

Reserved

NC

23

PERn2

PCIe Lane 2

Device Receiver

24

Reserved

NC

25

PERp2

26

Reserved

NC

27

GND

GND

28

Reserved

NC

29

PETn1

PCIe Lane 1

Device Transmitter

30

Reserved

NC

31

PETp1

32

Reserved

NC

33

GND

GND

34

Reserved

NC

35

PERn1

PCIe Lane 1

Device Receiver

36

Reserved

NC

37

PERp1

38

Reserved

NC

39

GND

GND

40

Reserved

NC

41

PETn0

PCIe Lane 0

Device Transmitter

42

Reserved

NC

43

PETp0

44

Reserved

NC

45

GND

GND

46

Reserved

NC

47

PERn0

PCIe Lane 0

Device Receiver

48

Reserved

NC

49

PERp0

50

PE-Reset

51

GND

GND

52

CLKREQ#

Clock Request

53

REFCLKn

PCIe Reference Clock

54

PEWAKE#

NC

55

REFCLKp

PCIe Reference Clock

56

MFG1

Manufacturing pin. Must be no-

connect on the host board.

57

GND

GND

58

MFG2

Notch

Notch

67

Reserved

NC

68

SUSCLK

NC

69

PEDET

NC-PCIe

70

+3.3V

3.3 V Source

71

GND

GND

72

+3.3V

3.3 V Source

73

GND

GND

74

+3.3V

3.3 V Source

75

GND

GND

Note: 1) The driv

e can’t detect PERST# in L1.2.