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DS75161AN Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DS75161AN
Description  IEEE-488 GPIB Transceivers
PDF  10 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DS75161AN Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Switching Characteristics VCC e 50V g5% TA e 0 Cto70 C (Note 1)
Symbol
Parameter
From
To
Conditions
DS75160A
DS75161A
DS75162A
Units
Min Typ Max Min Typ Max Min Typ Max
tPLH
Propagation Delay Time
VL e 23V
10
20
10
20
10
20
ns
Low to High Level Output
Terminal Bus
RL e 383X
tPHL
Propagation Delay Time
CL e 30 pF
14
20
14
20
14
20
ns
High to Low Level Output
Figure 1
tPLH
Propagation Delay Time
VL e 50V
14
20
14
20
14
20
ns
Low to High Level Output
Bus
Terminal
RL e 240X
tPHL
Propagation Delay Time
CL e 30 pF
10
20
10
20
10
20
ns
High to Low Level Output
Figure 2
tPZH
Output Enable Time
VI e 30V
19
32
23
40
23
40
ns
to High Level
VL e 0V
RL e 480X
tPHZ
Output Disable Time
TE DC
15
22
15
25
15
25
ns
CL e 15 pF
From High Level
or SC
Figure 1
tPZL
Output Enable Time
(Note 2)
Bus
VI e 0V
24
35
28
48
28
48
ns
to Low Level
(Note 3)
VL e 23V
RL e 383X
tPLZ
Output Disable Time
17
25
17
27
17
27
ns
CL e 15 pF
From Low Level
Figure 1
tPZH
Output Enable Time
VI e 30V
17
33
18
40
18
40
ns
to High Level
VL e 0V
RL e 3kX
tPHZ
Output Disable Time
TE DC
15
25
22
33
22
33
ns
CL e 15 pF
From High Level
or SC
Terminal Figure 1
tPZL
Output Enable Time
(Note 2)
VI e 0V
25
39
28
52
28
52
ns
to Low Level
(Note 3)
VL e 5V
RL e 280X
tPLZ
Output Disable Time
15
27
20
35
20
35
ns
CL e 15 pF
From Low Level
Figure 1
tPZH
Output Pull-Up Enable
VI e 3V
10
17
NA
NA
ns
Time (DS75160A Only)
PE
Bus
VL e 0V
RL e 480X
tPHZ
Output Pull-UP Disable
(Note 2)
10
15
NA
NA
ns
CL e 15 pF
Time (DS75160A Only)
Figure 1
Note 1
Typical values are for VCC e 50V and TA e 25 C and are meant for reference only
Note 2
Refer to Functional Truth Tables for control input definition
Note 3
Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the VI voltage source when the output
connected to that input becomes active
Switching Load Configurations
TLF5804 – 8
VC logic high e 30V
VC logic low e 0V
CL includes jig and probe capacitance
FIGURE 1
VC logic high e 30V
VC logic low e 0V
TLF5804 – 9
CL includes jig and probe capacitance
FIGURE 2
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