PCF8536AT datasheet(27/54 Pages) NXP

27 / 54 page

PCA85233

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Product data sheet

Rev. 5 — 12 November 2018

27 of 54

NXP Semiconductors

PCA85233

Automotive 80 × 4 LCD driver for low multiplex rates

Having two reserved slave addresses allows the following on the same I2C-bus:

• Up to 8 PCA85233 on the same I2C-bus for very large LCD applications

• The use of two types of LCD multiplex drive modes on the same I2C-bus

The I2C-bus protocol is shown in Figure 18. The sequence is initiated with a START

condition (S) from the I2C-bus master which is followed by one of the available PCA85233

slave addresses. All PCA85233 with the same SA0 level acknowledge in parallel to the

slave address. All PCA85233 with the alternative SA0 level ignore the whole I2C-bus

transfer.

After acknowledgement, the control byte is sent, defining if the next byte is a RAM or

command information. The control byte also defines if the next byte is a control byte or

further RAM or command data (see Figure 19 and Table 18). In this way it is possible to

configure the device and then fill the display RAM with little overhead.

Fig 18. I2C-bus protocol

Fig 19. Control byte format

PCF8536AT Datasheet(PDF) 27 Page - NXP Semiconductors