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74LS122 Datasheet(PDF) 2 Page - ON Semiconductor |
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74LS122 Datasheet(HTML) 2 Page - ON Semiconductor |
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2 / 12 page ![]() SN74LS122 SN74LS123 http://onsemi.com 2 SN74LS122 (TOP VIEW) (SEE NOTES 1 THRU 4) SN74LS123 (TOP VIEW) (SEE NOTES 1 THRU 4) NOTES: 1. An external timing capacitor may be connected between Cext and Rext/Cext (positive). 2. To use the internal timing resistor of the LS122, connect Rint to VCC. 3. For improved pulse width accuracy connect an external resistor between Rext/Cext and VCC with Rint open-circuited. 4. To obtain variable pulse widths, connect an external variable resistance between Rint/Cext and VCC. 14 13 12 11 10 9 12345 6 8 7 VCC Rext/ Cext NC Cext NC Rint Q A1 A2 B1 B2 CLR Q GND CLR Q Q Rint 2 Rext/ Cext 1 Cext 1Rext/ Cext 14 13 12 11 10 9 12345 6 7 16 15 8 VCC 1A 1Q 2Q 2B 2 CLR 2A 1B 1 CLR 1Q 2Q 2 Cext GND Q Q Q Q CLR CLR NC — NO INTERNAL CONNECTION. |
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