ISO6741FDWR datasheet(16/35 Pages) TI

16 / 35 page

6.19 Switching Characteristics—2.5-V Supply

VCC1 = VCC2 = 2.5 V ±10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

tPLH, tPHL

Propagation delay time

@100kbps

See Figure 7-1

20.5

PWD

Pulse width distortion(1) |tPHL – tPLH|

7.1 (4)

tsk(o)

Channel-to-channel output skew time(2)

Same-direction channels

tsk(pp)

Part-to-part skew time(3)

Output signal rise time

See Figure 7-1

Output signal fall time

tPHZ

Disable propagation delay, high-to-high impedance

output

See Figure 7-1

28.1

tPLZ

Disable propagation delay, low-to-high impedance

output

28.1

tPZH

Enable propagation delay, high impedance-to-high

output for ISO674x

20.4

36.3

tPZL

Enable propagation delay, high impedance-to-low

output for ISO674x

20.4

36.3

tPU

Time from UVLO to valid output

data

Time from UVLO

to valid output

data

300

tDO

Default output delay time from input power loss

Measured from the time VCC goes

below 1.2V. See Figure 7-3

0.1

0.3

tie

Time interval error

216 – 1 PRBS data at 50 Mbps

(1)

Also known as pulse skew.

(2)

tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4)

Based on limited data

ISO6741

SLLSFJ6A – AUGUST 2020 – REVISED OCTOBER 2020

www.ti.com

Submit Document Feedback

Product Folder Links: ISO6741

ISO6741FDWR Datasheet(PDF) 16 Page - Texas Instruments

ISO6741FDWR Datasheet(HTML) 16 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

Datasheet Download

Link URL