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ISO6741FDWR Datasheet(PDF) 19 Page - Texas Instruments |
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ISO6741FDWR Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 35 page  VI VCC IN OUT VO CL See Note A IN = 0 V (Devices without suffix F) IN = VCC (Devices with suffix F) VO VI VOL VOH VCC 0 V 1.4 V 50% tDO default high default low See Note B A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. B. Power Supply Ramp Rate = 10 mV/ns Figure 7-3. Default Output Delay Time Test Circuit and Voltage Waveforms IN OUT VCCO GNDI + ± VCM + ± VOH or VOL VCCI Pass-fail criteria: The output must remain stable. C = 0.1 µF ±1% C = 0.1 µF ±1% CL See Note A S1 GNDO A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 7-4. Common-Mode Transient Immunity Test Circuit www.ti.com ISO6741 SLLSFJ6A – AUGUST 2020 – REVISED OCTOBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: ISO6741 |
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