LM8500 datasheet(14/20 Pages) NSC

14 / 20 page

12.0 Averaging Algorithm (Continued)

12.2 FOCUS ALGORITHM

The focus algorithm removes some inaccuracy and noise

that could cause the coordinate to differ only by a couple of

pixels. The focus algorithm is used to eliminate the "jittering"

effect of the pointer when the pointer is stationary.

The focus algorithm compares the value of the previous

stored value to the value passed from the delta algorithm

and determines if the difference is greater than or equal to

the Set Focus Value. If the difference is greater or equal to

the value in Set Focus Value then the new coordinate is sent

out through the UART and stored as the previous value. If

the difference is less than the Set Focus Value then the

value is discarded and the stored valued is set through the

UART.

The amount of difference between the new coordinate and

the old coordinate is set in the Set Focus Value. This value

can be from 0-63 with a value of 0 disabling the focus

algorithm. The factory default is 4.

12.3 COMMUNICATION MODES

Liftoff

When set to the liftoff mode, the controller only sends data

through the UART on liftoff. The controller continuously

samples the touchscreen as long as there is a touch de-

tected on the touchscreen but only the last coordinate is sent

out to the UART.

Touchdown

When set to the touchdown mode, the controller only sends

data through the UART on touchdown. The controller con-

tinuously samples the touchscreen as long as there is a

touch detected on the touchscreen but only the first coordi-

nate is sent out to the UART.

Streaming

When set to the streaming mode, the controller continuously

sends data through the UART as long as there is a touch

detected on the touchscreen.

13.0 Brownout Reset

The device is initialized when the RESET pin is pulled low or

the On-chip Brownout Reset is activated.

The RESET input initializes the device when pulled low. The

RESET pin must be held low for a minimum of 0.5µs for the

LM8500 and a minimum of 1.5µs for the LM8300 to guaran-

tee a valid reset. Reset should also be wide enough to

ensure crystal start-up upon power-up. The R/C circuit

shown in Figure 3 is an optional circuitry that will provide a

delay 5 times (5x) greater than the power supply.

When enabled, the device generates an internal reset as

CC rises. While VCC is less than the specified brownout

voltage (V

bor), the device is held in the reset condition for tid

= 120-128 µs for the LM8500 and t

id = 360-384 µs for the

LM8300. Once the t

id reaches zero, the internal reset is

released and the controller resume normal operation. This

internal reset will perform the same functions as external

reset. Once V

CC is above the Vbor and tid reaches zero,

instruction execution begins. If, however, V

CC drops below

the selected V

bor, an internal reset is generated, and tid is set

to 120-128 µs for the LM8500 and 360-384 µs for the

LM8300. The device now waits until V

CC is greater than Vbor,

at which time the countdown starts over. When enabled, the

functional operation of the device, at frequency, is guaran-

teed down to the V

bor level.

One exception to the above is that the brownout circuit will

insert a delay of approximately 3 ms on power up or any time

the V

CC drops below a voltage of about 1.8V. The device will

be held in Reset for the duration of this delay before t

id starts

count down. This delay starts as soon as the V

CC rises

above the trigger voltage (approximately 1.8V). This behav-

ior is shown in Figure 4.

In Case 1, V

CC rises from 0V and the on-chip RESET is

undefined until the supply is greater than approximately

1.0V. At this time the brownout circuit becomes active and

holds the device in RESET. As the supply passes a level of

about 1.8V, a delay of about 3 ms (td) is started and t

id is

preset with 120-128 µs for the LM8500 or 360-384 µs for the

LM8300. Once V

CC is greater than Vbor and td has expired,

id starts to count down.

Case 2 shows a subsequent dip in the supply voltage which

goes below the approximate 1.8V level. As V

CC drops below

bor, the internal RESET signal is asserted. When VCC rises

back above the 1.8V level, td is started. Since the power

supply rise time is longer for this case, td has expired before

CC rises above Vbor and tidstarts immediately when VCC is

greater than V

bor.

Case 3 shows a dip in the supply where V

CC drops below

bor, but not below 1.8V. On-chip RESET is asserted when

CC goes below Vbor and tid starts as soon as the supply

goes back above V

bor.

20037205

FIGURE 3. Optional Reset Circuit using External Reset

LM8500 Datasheet(PDF) 14 Page - National Semiconductor (TI)

LM8500 Datasheet(HTML) 14 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL