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RA2L1 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RA2L1 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 110 page ![]() RA2L1 Group Renesas Microcontrollers Ultra low power 48 MHz Arm® Cortex®-M23 core, up to 256-KB code flash memory, 32 KB SRAM, Capacitive Sensing Unit 2 (CTSU), 12-bit A/D Converter, 12-bit D/A Converter, Security and Safety features. Features R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 ■ Arm Cortex-M23 Core ● Armv8-M architecture ● Maximum operating frequency: 48 MHz ● Arm Memory Protection Unit (Arm MPU) with 8 regions ● Debug and Trace: DWT, FPB, CoreSight™ MTB-M23 ● CoreSight Debug Port: SW-DP ■ Memory ● Up to 256-KB code flash memory ● 8-KB data flash memory (100,000 program/erase (P/E) cycles) ● 32 KB SRAM ● Memory protection units ● 128-bit unique ID ■ Connectivity ● Serial Communications Interface (SCI) × 5 – Asynchronous interfaces – 8-bit clock synchronous interface – Simple IIC – Simple SPI – Smart card interface ● Serial Peripheral Interface (SPI) × 2 ● I2C bus interface (IIC) × 2 ● CAN module (CAN) ■ Analog ● 12-bit A/D Converter (ADC12) ● 12-bit D/A Converter (DAC12) ● Low-Power Analog Comparator (ACMPLP) × 2 ● Temperature Sensor (TSN) ■ Timers ● General PWM Timer 32-bit (GPT32) × 4 ● General PWM Timer 16-bit (GPT16) × 6 ● Low Power Asynchronous General Purpose Timer (AGT) × 2 ● Watchdog Timer (WDT) ■ Safety ● ECC in SRAM ● SRAM parity error check ● Flash area protection ● ADC self-diagnosis function ● Clock Frequency Accuracy Measurement Circuit (CAC) ● Cyclic Redundancy Check (CRC) calculator ● Data Operation Circuit (DOC) ● Port Output Enable for GPT (POEG) ● Independent Watchdog Timer (IWDT) ● GPIO readback level detection ● Register write protection ● Main oscillator stop detection ● Illegal memory access ■ Security and Encryption ● AES128/256 ● True Random Number Generator (TRNG) ■ System and Power Management ● Low power modes ● Switching regulator ● Realtime Clock (RTC) ● Event Link Controller (ELC) ● Data Transfer Controller (DTC) ● Key Interrupt Function (KINT) ● Power-on reset ● Low Voltage Detection (LVD) with voltage settings ■ Human Machine Interface (HMI) ● Capacitive Sensing Unit 2 (CTSU) ■ Multiple Clock Sources ● Main clock oscillator (MOSC) (1 to 20 MHz) ● Sub-clock oscillator (SOSC) (32.768 kHz) ● High-speed on-chip oscillator (HOCO) (24/32/48/64 MHz) ● Middle-speed on-chip oscillator (MOCO) (8 MHz) ● Low-speed on-chip oscillator (LOCO) (32.768 kHz) ● Clock trim function for HOCO/MOCO/LOCO ● IWDT-dedicated on-chip oscillator (15 kHz) ● Clock out support ■ Up to 85 pins for general I/O ports ● 5-V tolerance, open drain, input pull-up ■ Operating Voltage ● VCC: 1.6 to 5.5 V ■ Operating Temperature and Packages ● Ta = -40℃ to +85℃ – 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) – 80-pin LQFP (12 mm × 12 mm, 0.5 mm pitch) – 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) – 48-pin LFQFP (7 mm × 7 mm, 0.50 mm pitch) – 48-pin HWQFN (7 mm × 7 mm, 0.50 mm pitch) ● Ta = -40℃ to +105℃ – 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch) – 80-pin LQFP (12 mm × 12 mm, 0.5 mm pitch) – 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch) – 48-pin LFQFP (7 mm × 7 mm, 0.50 mm pitch) – 48-pin HWQFN (7 mm × 7 mm, 0.50 mm pitch) R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 Page 1 of 110 Datasheet |
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