IL9270

PIN DESCRIPTIONS

NAME

PIN

DESCRIPTION

ESt

16

Early steering output. Presents a logic high immediately when the digital

algorithm detects a recognizable tone-pair (signal condition). Any momentary

loss of signal condition will cause ESt to return to a logic low.

GS

3

Gain Select. Gives access to output of front-end differential amplifier for

connection of feedback resistor.

IC

5,6

Internal Connection. Must be tied to GND.

IN+

1

Non-Inverting Input

Connections to the front-end

IN-

2

Inverting Input

differential amplifier.

C1

7

Clock Input

3.579545 MHz crystal connected between

C2

8

Clock Output

these pins completes internal oscillator.

Q1-Q4

11-14

3-state data outputs. When enabled by OE, provide the code corresponding to the

last valid tone-pair received.

StD

15

Delayed steering output. Presents a logic high when a received tone-pair has been

registered and the output latch updated; returns to logic low when the voltage on

St/GT

17

detected at St causes the device to register the detected tone-pair and update the

The GT output acts to reset the external steering time-constant; its state is a

function of ESt and the voltage on St.

OE

10

3-state output enable (input). Logic high enables the outputs Q1-Q4. Internal

pull-up.

18

Positive power supply, +5 V.

4

mid-rail.

GND

9

Negative power supply, normally connected to 0 V.

FUNCTIONAL DESCRIPTION

The IL9270 monolithic DTMF receivers offer small size,

low power consumption and high performance. The

architecture consists of a bandsplit filter section, which

separates the high and low tones of a receiver pair,

followed by a digital counting section which verifies the

frequency and duration of the received tones before

passing the corresponding code to the output bus.

Filter Section

Separation of the low-group and high-group tones is

achieved byapplying the dual-tone signal to the inputs of

two filters - a sixth order for the high group and an eight

order for the low group. The band-widths of which

correspond to the bands enclosing the low-group and

high-group tones (see Figure 1). The filter section also

incorporates

notches

at

350 Hz

and

440 Hz

for

exceptional dial-tone rejection. Each filter output is

followed by a second order switched-capacitor section

which smooths the signals prior to limiting. Limiting is

performed by high-gain comparators which are provided

with hysteresis to prevent detection of unwanted low-

level signals and noise; the outputs of the comparators

provide full-rail logic swings at the frequencies of the

incoming tones.