© 2018 Integrated Device Technology, Inc.

6

September 11, 2018

F1240 Datasheet

Electrical Characteristics

Table 4.

Electrical Characteristics

Parameter

Symbol

Condition

Minimum

Typical

Maximum

Units

Logic Input High Threshold

V

Logic Input Low Threshold

0.0

0.8

V

Logic Current

GA[5-0], GB[5-0]

-2

+2

µA

-10

+1

DC Current

STBY_A=STBY_B set for

logic HIGH

160

176

mA

STBY_A=STBY_B set for

logic LOW

2.3

5

Minimum Gain Step

LSB

0.5

dB

Attenuation Range

31.5

dB

Maximum Gain

Gain Setting = 20dB, or

Attenuator Setting = 0dB

18

20

dB

Minimum Gain

Gain Setting = -11.5dB, or

Attenuator Setting = 31.5dB

-11.5

-9

dB

Return Loss

RL

15

dB

Relative Phase Between the

Minimum and Maximum Attenuation

7

deg

14

20

Relative Phase over any 8 dB

Attenuation Range

3

deg

5

8

Step Error

DNL

0.08

dB

Absolute Attenuation Error

(Attenuation = 20 – Gain State)

INL

Over 50MHz to 300MHz and

temperature

±(0.3+5%ATT) Typical

dB

Over 300MHz to 500MHz and

temperature

±(0.5+5%ATT) Typical

1dB Gain Rolloff

BW

Frequency with a 1 dB gain

reduction compared to gain at

100MHz at the maximum gain

setting

350

MHz

Channel Isolation

ISOL

OUT_B referenced to OUT_A

with power applied at IN_A at

maximum gain setting

60

69

dBc

[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in

these columns that are not shown in bold italics are guaranteed by design characterization.