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F1240NBGI Datasheet(PDF) 17 Page - Renesas Technology Corp |
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F1240NBGI Datasheet(HTML) 17 Page - Renesas Technology Corp |
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17 / 35 page ![]() © 2018 Integrated Device Technology, Inc. 17 September 11, 2018 F1240 Datasheet Programming F1240 can be programmed using either the parallel or serial interface which is selectable via VMODE (pin 4). The serial mode is selected by setting VMODE to a logic LOW and the parallel mode by floating VMODE or by setting VMODE to a logic HIGH. Serial Mode F1240 Serial Mode is selected by setting VMODE to a logic LOW. The serial interface is a 16 bit shift register made up of two words. The first word is the address or channel word, which uses only 1 of 8 bits to select the channel that will be programmed. The second 8 bit word is the Gain (or attenuation) word, which uses 6 bits to control the DSA state and one bit to enable or disable the channel. When serial programming is used, all of the other parallel control input pins (3, 6-10, 25, 31, 32) can be left floating. Table 8. 8-Bit SPI Address (Channel) Word Sequence Data Bit Symbol A7 Not Used A6 Not Used A5 Not Used A4 Not Used A3 Not Used A2 Not Used A1 Not Used A0 Channel Selection Table 9. Truth Table for Address (Channel) Control Word A7 (MSB) A6 A5 A4 A3 A2 A1 A0 (LSB) Program Channel 0 0 0 0 0 0 0 0 A 0 0 0 0 0 0 0 1 B Table 10. 8-Bit SPI Gain (Attenuation) Word Sequence Data Bit Symbol D7 Enable Bit D6 Attenuation 16 dB Control Bit D5 Attenuation 8 dB Control Bit D4 Attenuation 4 dB Control Bit D3 Attenuation 2 dB Control Bit D2 Attenuation 1 dB Control Bit D1 Attenuation 0.5 dB Control Bit D0 Not Used |
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