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F1956 Datasheet(PDF) 18 Page - Renesas Technology Corp |
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F1956 Datasheet(HTML) 18 Page - Renesas Technology Corp |
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18 / 24 page ![]() F1956 7-Bit 0.25 dB Wideband Digital Step Attenuator PIN DESCRIPTION Pin Name Function 1 DNC This pin must be left open. 2 VDD Main Supply. Use 3.3 V or 5 V. Bypass capacitor as close to pin as possible. 3 VMODE1 Logic low for parallel mode. Logic high or NC for serial mode. 4 A02 Address bit A0 connection. 5 GND Connect directly to paddle ground or as close as possible to pin with thru via. This pin is not internally connected 6 GND Connect directly to paddle ground or as close as possible to pin with thru via. 7 RF13 Device RF input or output (bi-directional). AC couple to this pin unless 0V DC. 8 – 17 GND Connect each pin directly to paddle ground or as close as possible to pin with thru vias. 18 RF23 Device RF input or output (bi-directional). AC couple to this pin unless 0V DC. 19 GND Connect directly to paddle ground or as close as possible to pin with thru via. 20 NC No internal connection. These pins can be left unconnected, voltage applied, or connected to ground (recommended). 21 A22 Address bit A2 connection 22 A12 Address bit A1 connection. 23 LE1 Serial interface latch enable input. 24 CLK1 Serial interface clock input. 25 DATA1 Serial interface data input. 26 D61 Parallel control bit, 16 dB. Ground pin if not used. 27 D51 Parallel control bit, 8 dB. Ground pin if not used. 28 D41 Parallel control bit, 4 dB. Ground pin if not used. 29 D31 Parallel control bit, 2 dB. Ground pin if not used. 30 D21 Parallel control bit, 1 dB. Ground pin if not used. 31 D11 Parallel control bit, 0.5 dB. Ground pin if not used. 32 D01 Parallel control bit, 0.25 dB. Ground pin if not used. EP Exposed Paddle Connect to Ground with multiple vias for good thermal and RF performance. |
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