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F1958 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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F1958 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 27 page  7-Bit 0.25dB Digital Step Attenuator 1MHz to 6GHz F1958 Datasheet © 2019 Integrated Device Technology, Inc. 1 November 13, 2019 Description The F1958 is part of IDT’s Glitch-FreeTM family of DSAs optimized for the demanding requirements of Base Station (BTS) radio cards and numerous other applications. This device is offered in a compact 4mm x 4mm 24-pin package with 50Ω input and output impedance for ease of integration into the radio or RF system. The F1958 offers very high reliability due to its construction from a monolithic silicon die in a QFN package. The insertion loss is very low with minimal distortion. Additionally, the device is designed to have extremely accurate attenuation levels. These accurate attenuation levels improve system SNR and/or ACLR by ensuring system gain is as close to the targeted level as possible. In addition, the very fast settling time in parallel mode is ideal for fast switching systems. Finally, the device uses our Glitch-FreeTM technology in contrast to competing DSAs. Competitive Advantage Lowest insertion loss for best SNR Glitch-FreeTM technology to protect power amplifiers or ADC during transitions between attenuation states Extremely accurate attenuation levels Ultra-low distortion MSL1 and 2000 V HBM ESD Typical Applications 3G/4G/4G+ Base Station Systems Distributed Antenna Systems, DAS Remote Radio Heads Active Antenna Systems, AAS Broadband Satellite Equipment NFC Infrastructure Military Communication Equipment Features Serial and 7-bit parallel interface 31.75dB range 0.25dB steps Glitch-FreeTM : low transient overshoot 500ns settling time for 0.25dB steps Ultra linear > 63dBm IIP3 Low insertion loss < 1.7dB at 4GHz Attenuation error < ±0.2dB at 4GHz Bi-directional RF use 3.3V or 5V supply -40°C to +105°C operating temperature 4mm x 4mm Thin QFN 24-pin package Block Diagram Figure 1. Block Diagram Decoder RF1 RF2 SPI Bias Glitch-FreeTM |
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