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Advanced CMOS Logic – 54AC00

Rev 1.0

19/02/21

LIMITS

PARAMETER

any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Silicon Supplies Ltd

hereby disclaims any and all warranties and liabilities of any kind.

approval of Silicon Supplies Ltd, if a failure of such components can reasonably be expected to cause the failure of that life support device or system or

to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to

support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

SYMBOL

CONDITIONS

85°C

FULL RANGE

4

UNITS

25°C

Maximum Input

Capacitance

5

-

4.5

4.5

4.5

pF

TYPICAL

Power Dissipation

Capacitance Per Gate

6

-

pF

30

5. All outputs loaded; thresholds on input associated with output under test. 6. Test time 1sec max, measurement made by forcing indicated current

and measuring voltage to minimize power dissipation. Test verifies a minimum 75Ω transmission-line drive capability at 125°C 7. Maximum test

duration 2ms, one output loaded at a time Not production tested in die form, characterized by chip design and tested in package. 8. Used to

Switching Waveform

DUT

OUTPUT

TEST POINT

Test Circuit

* Includes all probe and jig capacitance

Figure 2

Figure 1