54AC240 datasheet(4/6 Pages) SS

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Advanced CMOS Logic – 54AC240

Rev 1.0

01/05/18

DC Electrical Characteristics (Voltages Referenced to GND)

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

UNITS

3.0V

2.1

4.5V

3.15

Minimum High-Level

Input Voltage

VIH

5.5V

VOUT = 0.1V or

VCC -0.1V

│IOUT│≤ 20µA

3.85

3.0V

0.9

4.5V

1.35

Maximum Low-Level

Input Voltage

VIL

5.5V

VOUT = 0.1V or

VCC -0.1V

│IOUT│≤ 20µA

1.65

3.0V

2.9

4.5V

4.4

5.5V

IOUT = -50µA

5.4

3.0V

VIN = VIL or VIH

IOH = -12 mA

2.56

2.46

2.40

4.5V

VIN = VIL or VIH

IOH = -24mA

3.86

3.76

3.70

5.5V

VIN = VIL or VIH

IOH = -24mA

4.86

4.76

4.70

Minimum High-Level

Output Voltage

VOH

5.5V

VIN = VIL or VIH

IOH = -50mA

3.85

3.0V

0.1

4.5V

0.1

5.5V

IOUT = 50µA

0.1

3.0V

VIN = VIH or VIL

│IOUT│≤ 12mA

0.36

0.44

0.5

4.5V

VIN = VIH or VIL

│IOUT│≤ 24mA

0.36

0.44

0.5

5.5V

VIN = VIH or VIL

│IOUT│≤ 24mA

0.36

0.44

0.5

Maximum Low-Level

Output Voltage

VOL

5.5V

VIN = VIH or VIL

│IOUT│50mA

1.65

Maximum Input

Leakage Current

IIN

5.5V

VIN = VCC or GND

±0.1

±1.0

µA

Maximum 3-State

Leakage Current

IOZ

5.5V

VOUT=VCC or GND

VIN = VIL or VIH

±0.5

±2.5

±5

µA

IOLD

5.5V

VOLD = 1.65V Max

Minimum Dynamic

Output Current

IOHD

5.5V

VOHD = 3.85V Min

-75

-50

Maximum Quiescent

Supply Current

ICC

5.5V

VIN = VCC or GND

IOUT = 0µA

160

µA

4. -55˚C ≤ TJ ≤ +125˚C 5. All outputs loaded; thresholds on input associated with output under test. 6. Test time 1sec max, measurement

made by forcing indicated current and measuring voltage to minimize power dissipation. Test verifies a minimum 75Ω transmission-line drive

capability at 125°C 7. Maximum test duration 2ms, one output loaded at a time

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