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ADRV9010BBCZ Datasheet(PDF) 3 Page - Analog Devices |
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ADRV9010BBCZ Datasheet(HTML) 3 Page - Analog Devices |
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3 / 115 page  Data Sheet ADRV9010 Rev. E | Page 3 of 115 FUNCTIONAL BLOCK DIAGRAM ADC LO3 LO1 LO2 ADC DECIMATION, pFIR, DC OFFSET, QEC, TUNING, OVERLOAD DECIMATION, pFIR, AGC, DC OFFSET, QEC, TUNING, RSSI, OVERLOAD pFIR, LO LEAKAGE, QEC, TUNING, INTERPOLATION JESD204B/ JESD204C SERIAL INTERFACE CONTROL INTERFACE SPI PORT GPIO AUXILIARY ADC AUXILIARY DAC CLOCK GENERATION AND SYNCHRONIZATION POWER MANAGEMENT VDDA_1P8 GPIO_ANA_x AUXADC_x GPIO_x VDIG_1P0 EXT_LO1± DEVCLK± SYSREF± SPI_CLK SPI_EN SPI_DO SPI_DIO GPINT1 TEST_EN SERDOUTA± SERDINA± SERDINB± SERDINC± SERDIND± SERDINE± SERDINF± SERDING± SERDINH± SYNCOUT1± SYNCOUT2± SERDOUTB± SERDOUTC± SERDOUTD± SERDOUTE± SERDOUTF± SERDOUTG± SERDOUTH± SYNCIN1± SYNCIN2± SYNCIN3± RESET ORX_CTRL_x TXx_EN RXx_EN GPINT2 EXT_LO2± RX3+ RX3– RX4+ RX4– RX1+ RX1– RX2+ RX2– TX3+ TX3– TX4+ TX4– TX1+ TX1– TX2+ TX2– ORX3+ ORX3– ORX4+ ORX4– ORX1+ ORX1– ORX2+ ORX2– NOTES 1. VDDA_1P8 REPRESENTS VCONV1_1P8, VCONV2_1P8, VANA1_1P8, VANA2_1P8, VANA3_1P8, VANA4_1P8, AND VJVCO_1P8. VDDA_1P3 REPRESENTS VANA1_1P3, VANA2_1P3, VCONV1_1P3, VCONV2_1P3, VRFVCO1_1P3, VRFVCO2_1P3, VAUXVCO_1P3, VCLKVCO_1P3, VRFSYN1_1P3, VRFSYN2_1P3, VCLKSYN_1P3, VAUXSYN_1P3, VRXLO_1P3, AND VTXLO_1P3. VDDA_1P0 REPRESENTS VJSYN_1P0, VDES_1P0, VTT_DES, AND VSER_1P0. VIF VDDA_1P0 VDDA_1P3 RF SYNTHESIZER RF SYNTHESIZER RF SYNTHESIZER MICROPROCESSOR ORx1/ORx2 90 0 DAC DAC Tx2 Tx1 90 0 LO1 LO2 LO1 LO3 LO2 ADC ADC Rx2 Rx1 Rx1, Rx2, Tx1, Tx2, ORx1/ORx2 Rx3, Rx4, Tx3, Tx4, ORx3/ORx4 90 0 4 4 4 4 19 8 ADRV9010 Figure 1. |
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