2/7
2004-04-26
DC PIR CONTROLLER
WITH REMOTE CONTROL
PIR CONTROLLER
M7613
一華半導體股份有限公司
MOSDESIGN SEMICONDUCTOR CORP.
PIN DESCRIPTION
Pin No.
Pin Name
I/O
Description
18 Pins
20 Pins
A0~A3
I
Code Address pin Nos.0~3. There four tri-state pins are detected to determine
the encoded waveform bit 0 ~ bit 3.Each pin can be set to
“0”,”1” or
“f”(floating).
1-4
1-4
A8/D0~A11/D3
I
Code Address pin Nos.8~11/Data pin Nos.0~3.
There four tri-state pins are detected to determine the encoded waveform bit 8 ~
bit 11.When these pins are used as address pins, they can be set to “0”,”1” or
“f”(floating).When these pins are used as data pins, they can be set only to
“0”ot”1”.
5-6
5-8
Rosc
I
Encoder system oscillator ( Rosc=1.1Mohm,Typ.=38KHz )
7
9
VSS
System ground.
8
10
CDS
I
Connect to a CDS for inhibit , when Vinhi = 0 disable ,Vinhi = 1 enable trigger
9
11
RTX
I
Delay timer oscillator input
The delay time of receiving PIR signal to trigger Encoder or a high signal to
trigger relay.
The range for：RTX=2 KΩ ~ 5 M Ω
CTX=100P~0.01UF
FOR 100P or 0.01uf delay time=45000 R*C
FOR 1000P delay time=35000 R*C
Delay Time ：20 ms ~ 2250s
Ex：CTX=100p，RTX=680KΩ，Delay Time=3.1s
CTX=1000p，RTX=100KΩ，Delay Time=3.5s
CTX=0.01uf，RTX=10KΩ，Delay Time=4.5s
10
12
RTI
I
Latch timer oscillator input
The latch time of the range for：RTI=100 KΩ ~ 1 MΩ
CTI=0.1UF(fix)
Contain Time=35 R*C
Contain time ：> 0.5s ~
Ex：CTI=0.1uf，RTI=1MΩ，Contain Time=3.5s
11
13
UOU2
O
2
nd stage OP amp output.
12
14
II2
I
2
nd stage OP amp negative input.
13
15
NII1
I
1
st stage OP amp positive input.
14
16
II1
I
1
st stage OP amp negative input.
15
17
UOU1
I
1
st stage OP amp output.
16
18
DOUT
O
Data Output pin. The encoder waveform is serially outputted to this pin.
When PIR is not detecting，DOUT output low (VSS) voltage
17
19
VDD
Operation voltage：5V，Stand by current：80~90uA
18
20
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