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TMUX7211 Datasheet(PDF) 32 Page - Texas Instruments |
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TMUX7211 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 42 page ![]() 12 Layout 12.1 Layout Guidelines When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners. Figure 12-1 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections. WORST BETTER BEST 1W min. W Figure 12-1. Trace Example Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, through-hole pins are not recommended at high frequencies. Some key considerations are: • Decouple the supply pins with a 0.1-µF and 1 µF capacitor, placed lowest value capacitor as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage. • Keep the input lines as short as possible. • Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup. • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary. • Using multiple vias in parallel will lower the overall inductance and is beneficial for connection to ground planes. 12.2 Layout Example SEL1 D1 S1 VSS D2 S2 TMUX721x VDD SEL2 N.C. S3 D3 SEL3 GND S4 D4 SEL4 Wide (low inductance) trace for power Wide (low inductance) trace for power Via to ground plane Figure 12-2. TMUX721x Layout Example TMUX7211, TMUX7212, TMUX7213 SCDS416B – OCTOBER 2020 – REVISED APRIL 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMUX7211 TMUX7212 TMUX7213 |
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