VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC830

Dual 2x2 Crosspoint Switch

2.7Gb/s Asynchronous

G52192-0, Rev 4.0

Page 12

05/23/01

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Design Guide

Introduction

The purpose of this document is to make it easier for system designers to use the VSC830 2.7Gb/s dual 2x2

crosspoint switch. This guide provides guidelines for I/O terminations, power supply decoupling and board lay-

out.

Signal Terminations

The high-speed inputs (A1A+/-, A1B+/-, A2A+/- and A2B+/-) on the VSC830 are internally terminated

with a programmable 100

Ω termination between the true and complement input. The input termination can be

disabled by connecting the TERM_ENABLE pin to VEE. High impedance internal biasing resistors provide the

correct bias voltage at the inputs for AC-coupled applications (Figure 5).

Figure 5: High-Speed Input Termination

2.0 V

2.0 V

Chip Boundary

2.0 V

2.0 V

Chip Boundary

100

a) Termination Enabled

b) Termination Disabled