AX88852 datasheet(15/39 Pages) ASIX

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AX88850

PRELIMINARY

ASIX ELECTRONICS CORPORATION

2.3 Station Management Interface

Signal Name

Type Pin No.

Description

SMDC

116

Station Management Data Clock : The timing reference for MDIO. All data

transfers on MDIO are synchronized to the rising edge of this clock. MDC is

limited to a maximum frequency of 2.5MHz.

SMDIO

I/O/L

/PU

115

Station Management Data Input / Output : Serial data input/output transfers

from/to the internal registers or PHYs . The transfer protocol conforms to the

IEEE 802.3u MII specification.

/SMDV

I/PU

114

Station Management Data Valid : Asserted when a valid read/write command

is present.

SMDIR

O/L

110

Station Management Data Direction : Direction signal for an external bi-

directional buffer on the MDIO signal.

0 = MDIO data flows into the AX88850

1 = MDIO data flows out of the AX88850

Defaults to 0 when no register access is present.

BSMDC

O/L

112

Buffered Station Management Data Clock : Buffered MDC signal. Allow

more devices to be chained on the MII serial bus.

BSMDIO

I/O/L

/PU

111

Buffered Station Management Data Input /Output : Buffered MDIO signal.

When the “PHY_access” bit in the CONFIG register is set High, the MDIO

signal is passed through to BMDIO for accessing the physical device chips.

2.4 Management Information Base (MIB) Interface

Signal Name

Type Pin No.

Description

I/O/Z

/MH

/PU

155

Management Data : Outputs management information for the AX88856 MIB

chip. This signal carries with RID_CH signal and port number of the in-

coming packet and is synchronous to IRD_CK signal.

MTX_RDY

O/L

109

Repeated Packet Ready : Repeated packet data ready to copy to MIB chip

indicator.

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